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Message-ID: <20220617203709.GA2400541-robh@kernel.org>
Date: Fri, 17 Jun 2022 14:37:09 -0600
From: Rob Herring <robh@...nel.org>
To: Heiko Stuebner <heiko@...ech.de>
Cc: wefu@...hat.com, robh+dt@...nel.org, atishp@...shpatra.org,
krzk+dt@...nel.org, hch@....de, devicetree@...r.kernel.org,
palmer@...belt.com, cmuellner@...ux.com, paul.walmsley@...ive.com,
linux-riscv@...ts.infradead.org, samuel@...lland.org,
philipp.tomsich@...ll.eu, mick@....forth.gr, drew@...gleboard.org,
guoren@...nel.org, linux-kernel@...r.kernel.org,
anup@...infault.org
Subject: Re: [PATCH 1/3] dt-bindings: riscv: document cbom-block-size
On Fri, 10 Jun 2022 02:43:06 +0200, Heiko Stuebner wrote:
> The Zicbom operates on a block-size defined for the cpu-core,
> which does not necessarily match other cache-sizes used.
>
> So add the necessary property for the system to know the core's
> block-size.
>
> Signed-off-by: Heiko Stuebner <heiko@...ech.de>
> Reviewed-by: Anup Patel <anup@...infault.org>
> ---
> Documentation/devicetree/bindings/riscv/cpus.yaml | 5 +++++
> 1 file changed, 5 insertions(+)
>
Acked-by: Rob Herring <robh@...nel.org>
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