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Message-ID: <3d35c330-acfe-c6d1-8963-4b9b6d44dbb5@arm.com>
Date:   Fri, 17 Jun 2022 15:13:00 +0100
From:   Robin Murphy <robin.murphy@....com>
To:     Matt Ranostay <mranostay@...com>,
        linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org
Cc:     Marc Zyngier <maz@...nel.org>, Nishanth Menon <nm@...com>
Subject: Re: [PATCH v2] arm64: dts: ti: k3-j721s2: fix overlapping GICD memory
 region

On 2022-06-17 15:02, Matt Ranostay wrote:
> GICD region was overlapping with GICR causing the latter to not map
> successfully, and in turn the gic-v3 driver would fail to initialize.
> 
> This issue was hidden till commit 2b2cd74a06c3 ("irqchip/gic-v3: Claim iomem resources")
> replaced of_iomap() calls with of_io_request_and_map() that internally
> called request_mem_region().
> 
> Respective console output before this patchset:
> 
> [    0.000000] GICv3: /bus@...000/interrupt-controller@...0000: couldn't map region 0
> 
> Fixes: 2b2cd74a06c3 ("irqchip/gic-v3: Claim iomem resources")

I think that should be b8545f9d3a54 ("arm64: dts: ti: Add initial 
support for J721S2 SoC") - the GIC change is the point at which Linux 
started *noticing* that the DT was wrong, but it's not what made the DT 
wrong.

Thanks,
Robin.

> Cc: Marc Zyngier <maz@...nel.org>
> Cc: Robin Murphy <robin.murphy@....com>
> Cc: Nishanth Menon <nm@...com>
> Signed-off-by: Matt Ranostay <mranostay@...com>
> ---
>   arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> Changes from v1:
> * Add missing Fixes: in commit messages
> 
> diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
> index be7f39299894..19966f72c5b3 100644
> --- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
> @@ -33,7 +33,7 @@ gic500: interrupt-controller@...0000 {
>   		ranges;
>   		#interrupt-cells = <3>;
>   		interrupt-controller;
> -		reg = <0x00 0x01800000 0x00 0x200000>, /* GICD */
> +		reg = <0x00 0x01800000 0x00 0x100000>, /* GICD */
>   		      <0x00 0x01900000 0x00 0x100000>, /* GICR */
>   		      <0x00 0x6f000000 0x00 0x2000>,   /* GICC */
>   		      <0x00 0x6f010000 0x00 0x1000>,   /* GICH */

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