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Date:   Fri, 17 Jun 2022 18:09:26 +0200
From:   Andy Shevchenko <andy.shevchenko@...il.com>
To:     Aidan MacDonald <aidanmacdonald.0x0@...il.com>
Cc:     Linus Walleij <linus.walleij@...aro.org>,
        Paul Cercueil <paul@...pouillou.net>,
        Marc Zyngier <maz@...nel.org>,
        "open list:BROADCOM NVRAM DRIVER" <linux-mips@...r.kernel.org>,
        "open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2 1/2] pinctrl: ingenic: Use irqd_to_hwirq()

On Fri, Jun 17, 2022 at 2:27 PM Aidan MacDonald
<aidanmacdonald.0x0@...il.com> wrote:
>
> Instead of accessing ->hwirq directly, use irqd_to_hwirq().

LGTM,
Reviewed-by: Andy Shevchenko <andy.shevchenko@...il.com>

> Suggested-by: Andy Shevchenko <andy.shevchenko@...il.com>
> Signed-off-by: Aidan MacDonald <aidanmacdonald.0x0@...il.com>
> ---
>  drivers/pinctrl/pinctrl-ingenic.c | 23 +++++++++++++----------
>  1 file changed, 13 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/pinctrl/pinctrl-ingenic.c b/drivers/pinctrl/pinctrl-ingenic.c
> index 1ca11616db74..69e0d88665d3 100644
> --- a/drivers/pinctrl/pinctrl-ingenic.c
> +++ b/drivers/pinctrl/pinctrl-ingenic.c
> @@ -3393,7 +3393,7 @@ static void ingenic_gpio_irq_mask(struct irq_data *irqd)
>  {
>         struct gpio_chip *gc = irq_data_get_irq_chip_data(irqd);
>         struct ingenic_gpio_chip *jzgc = gpiochip_get_data(gc);
> -       int irq = irqd->hwirq;
> +       irq_hw_number_t irq = irqd_to_hwirq(irqd);
>
>         if (is_soc_or_above(jzgc->jzpc, ID_JZ4740))
>                 ingenic_gpio_set_bit(jzgc, GPIO_MSK, irq, true);
> @@ -3405,7 +3405,7 @@ static void ingenic_gpio_irq_unmask(struct irq_data *irqd)
>  {
>         struct gpio_chip *gc = irq_data_get_irq_chip_data(irqd);
>         struct ingenic_gpio_chip *jzgc = gpiochip_get_data(gc);
> -       int irq = irqd->hwirq;
> +       irq_hw_number_t irq = irqd_to_hwirq(irqd);
>
>         if (is_soc_or_above(jzgc->jzpc, ID_JZ4740))
>                 ingenic_gpio_set_bit(jzgc, GPIO_MSK, irq, false);
> @@ -3417,7 +3417,7 @@ static void ingenic_gpio_irq_enable(struct irq_data *irqd)
>  {
>         struct gpio_chip *gc = irq_data_get_irq_chip_data(irqd);
>         struct ingenic_gpio_chip *jzgc = gpiochip_get_data(gc);
> -       int irq = irqd->hwirq;
> +       irq_hw_number_t irq = irqd_to_hwirq(irqd);
>
>         if (is_soc_or_above(jzgc->jzpc, ID_JZ4770))
>                 ingenic_gpio_set_bit(jzgc, JZ4770_GPIO_INT, irq, true);
> @@ -3433,7 +3433,7 @@ static void ingenic_gpio_irq_disable(struct irq_data *irqd)
>  {
>         struct gpio_chip *gc = irq_data_get_irq_chip_data(irqd);
>         struct ingenic_gpio_chip *jzgc = gpiochip_get_data(gc);
> -       int irq = irqd->hwirq;
> +       irq_hw_number_t irq = irqd_to_hwirq(irqd);
>
>         ingenic_gpio_irq_mask(irqd);
>
> @@ -3449,7 +3449,7 @@ static void ingenic_gpio_irq_ack(struct irq_data *irqd)
>  {
>         struct gpio_chip *gc = irq_data_get_irq_chip_data(irqd);
>         struct ingenic_gpio_chip *jzgc = gpiochip_get_data(gc);
> -       int irq = irqd->hwirq;
> +       irq_hw_number_t irq = irqd_to_hwirq(irqd);
>         bool high;
>
>         if ((irqd_get_trigger_type(irqd) == IRQ_TYPE_EDGE_BOTH) &&
> @@ -3477,6 +3477,7 @@ static int ingenic_gpio_irq_set_type(struct irq_data *irqd, unsigned int type)
>  {
>         struct gpio_chip *gc = irq_data_get_irq_chip_data(irqd);
>         struct ingenic_gpio_chip *jzgc = gpiochip_get_data(gc);
> +       irq_hw_number_t irq = irqd_to_hwirq(irqd);
>
>         switch (type) {
>         case IRQ_TYPE_EDGE_BOTH:
> @@ -3498,12 +3499,12 @@ static int ingenic_gpio_irq_set_type(struct irq_data *irqd, unsigned int type)
>                  * best we can do is to set up a single-edge interrupt and then
>                  * switch to the opposing edge when ACKing the interrupt.
>                  */
> -               bool high = ingenic_gpio_get_value(jzgc, irqd->hwirq);
> +               bool high = ingenic_gpio_get_value(jzgc, irq);
>
>                 type = high ? IRQ_TYPE_LEVEL_LOW : IRQ_TYPE_LEVEL_HIGH;
>         }
>
> -       irq_set_type(jzgc, irqd->hwirq, type);
> +       irq_set_type(jzgc, irq, type);
>         return 0;
>  }
>
> @@ -3668,20 +3669,22 @@ static const struct pinctrl_ops ingenic_pctlops = {
>  static int ingenic_gpio_irq_request(struct irq_data *data)
>  {
>         struct gpio_chip *gpio_chip = irq_data_get_irq_chip_data(data);
> +       irq_hw_number_t irq = irqd_to_hwirq(data);
>         int ret;
>
> -       ret = ingenic_gpio_direction_input(gpio_chip, data->hwirq);
> +       ret = ingenic_gpio_direction_input(gpio_chip, irq);
>         if (ret)
>                 return ret;
>
> -       return gpiochip_reqres_irq(gpio_chip, data->hwirq);
> +       return gpiochip_reqres_irq(gpio_chip, irq);
>  }
>
>  static void ingenic_gpio_irq_release(struct irq_data *data)
>  {
>         struct gpio_chip *gpio_chip = irq_data_get_irq_chip_data(data);
> +       irq_hw_number_t irq = irqd_to_hwirq(data);
>
> -       return gpiochip_relres_irq(gpio_chip, data->hwirq);
> +       return gpiochip_relres_irq(gpio_chip, irq);
>  }
>
>  static int ingenic_pinmux_set_pin_fn(struct ingenic_pinctrl *jzpc,
> --
> 2.35.1
>


-- 
With Best Regards,
Andy Shevchenko

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