linux-kernel - Re: [PATCH v2 2/2] pinctrl: ingenic: Convert to immutable irq chip

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Message-ID: <CAHp75Vezjbd0rFbysgbw+Spq7WrML5eMu7FExJvpu1T_08Zxvg@mail.gmail.com>
Date:   Fri, 17 Jun 2022 18:11:25 +0200
From:   Andy Shevchenko <andy.shevchenko@...il.com>
To:     Aidan MacDonald <aidanmacdonald.0x0@...il.com>
Cc:     Linus Walleij <linus.walleij@...aro.org>,
        Paul Cercueil <paul@...pouillou.net>,
        Marc Zyngier <maz@...nel.org>,
        "open list:BROADCOM NVRAM DRIVER" <linux-mips@...r.kernel.org>,
        "open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2 2/2] pinctrl: ingenic: Convert to immutable irq chip

On Fri, Jun 17, 2022 at 2:28 PM Aidan MacDonald
<aidanmacdonald.0x0@...il.com> wrote:
>
> Update the driver to use an immutable IRQ chip to fix this warning:
>
>     "not an immutable chip, please consider fixing it!"
>
> Preserve per-chip labels by adding an irq_print_chip callback.

Reviewed-by: Andy Shevchenko <andy.shevchenko@...il.com>
One nit-pick below, though.

> Signed-off-by: Aidan MacDonald <aidanmacdonald.0x0@...il.com>
> ---
>  drivers/pinctrl/pinctrl-ingenic.c | 41 ++++++++++++++++++++-----------
>  1 file changed, 27 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/pinctrl/pinctrl-ingenic.c b/drivers/pinctrl/pinctrl-ingenic.c
> index 69e0d88665d3..787a8daa400e 100644
> --- a/drivers/pinctrl/pinctrl-ingenic.c
> +++ b/drivers/pinctrl/pinctrl-ingenic.c
> @@ -22,6 +22,7 @@
>  #include <linux/platform_device.h>
>  #include <linux/regmap.h>
>  #include <linux/slab.h>
> +#include <linux/seq_file.h>

Ordered?

>  #include "core.h"
>  #include "pinconf.h"
> @@ -135,7 +136,6 @@ struct ingenic_pinctrl {
>  struct ingenic_gpio_chip {
>         struct ingenic_pinctrl *jzpc;
>         struct gpio_chip gc;
> -       struct irq_chip irq_chip;
>         unsigned int irq, reg_base;
>  };
>
> @@ -3419,6 +3419,8 @@ static void ingenic_gpio_irq_enable(struct irq_data *irqd)
>         struct ingenic_gpio_chip *jzgc = gpiochip_get_data(gc);
>         irq_hw_number_t irq = irqd_to_hwirq(irqd);
>
> +       gpiochip_enable_irq(gc, irq);
> +
>         if (is_soc_or_above(jzgc->jzpc, ID_JZ4770))
>                 ingenic_gpio_set_bit(jzgc, JZ4770_GPIO_INT, irq, true);
>         else if (is_soc_or_above(jzgc->jzpc, ID_JZ4740))
> @@ -3443,6 +3445,8 @@ static void ingenic_gpio_irq_disable(struct irq_data *irqd)
>                 ingenic_gpio_set_bit(jzgc, JZ4740_GPIO_SELECT, irq, false);
>         else
>                 ingenic_gpio_set_bit(jzgc, JZ4730_GPIO_GPIER, irq, false);
> +
> +       gpiochip_disable_irq(gc, irq);
>  }
>
>  static void ingenic_gpio_irq_ack(struct irq_data *irqd)
> @@ -3687,6 +3691,27 @@ static void ingenic_gpio_irq_release(struct irq_data *data)
>         return gpiochip_relres_irq(gpio_chip, irq);
>  }
>
> +static void ingenic_gpio_irq_print_chip(struct irq_data *data, struct seq_file *p)
> +{
> +       struct gpio_chip *gpio_chip = irq_data_get_irq_chip_data(data);
> +
> +       seq_printf(p, "%s", gpio_chip->label);
> +}
> +
> +static const struct irq_chip ingenic_gpio_irqchip = {
> +       .irq_enable             = ingenic_gpio_irq_enable,
> +       .irq_disable            = ingenic_gpio_irq_disable,
> +       .irq_unmask             = ingenic_gpio_irq_unmask,
> +       .irq_mask               = ingenic_gpio_irq_mask,
> +       .irq_ack                = ingenic_gpio_irq_ack,
> +       .irq_set_type           = ingenic_gpio_irq_set_type,
> +       .irq_set_wake           = ingenic_gpio_irq_set_wake,
> +       .irq_request_resources  = ingenic_gpio_irq_request,
> +       .irq_release_resources  = ingenic_gpio_irq_release,
> +       .irq_print_chip         = ingenic_gpio_irq_print_chip,
> +       .flags                  = IRQCHIP_MASK_ON_SUSPEND | IRQCHIP_IMMUTABLE,
> +};
> +
>  static int ingenic_pinmux_set_pin_fn(struct ingenic_pinctrl *jzpc,
>                 int pin, int func)
>  {
> @@ -4175,20 +4200,8 @@ static int __init ingenic_gpio_probe(struct ingenic_pinctrl *jzpc,
>         if (!jzgc->irq)
>                 return -EINVAL;
>
> -       jzgc->irq_chip.name = jzgc->gc.label;
> -       jzgc->irq_chip.irq_enable = ingenic_gpio_irq_enable;
> -       jzgc->irq_chip.irq_disable = ingenic_gpio_irq_disable;
> -       jzgc->irq_chip.irq_unmask = ingenic_gpio_irq_unmask;
> -       jzgc->irq_chip.irq_mask = ingenic_gpio_irq_mask;
> -       jzgc->irq_chip.irq_ack = ingenic_gpio_irq_ack;
> -       jzgc->irq_chip.irq_set_type = ingenic_gpio_irq_set_type;
> -       jzgc->irq_chip.irq_set_wake = ingenic_gpio_irq_set_wake;
> -       jzgc->irq_chip.irq_request_resources = ingenic_gpio_irq_request;
> -       jzgc->irq_chip.irq_release_resources = ingenic_gpio_irq_release;
> -       jzgc->irq_chip.flags = IRQCHIP_MASK_ON_SUSPEND;
> -
>         girq = &jzgc->gc.irq;
> -       girq->chip = &jzgc->irq_chip;
> +       gpio_irq_chip_set_chip(girq, &ingenic_gpio_irqchip);
>         girq->parent_handler = ingenic_gpio_irq_handler;
>         girq->num_parents = 1;
>         girq->parents = devm_kcalloc(dev, 1, sizeof(*girq->parents),
> --
> 2.35.1
>


-- 
With Best Regards,
Andy Shevchenko