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Message-ID: <6b4f108c-b4bc-72cf-5972-222fbb2f3fca@gmail.com>
Date: Wed, 22 Jun 2022 13:05:13 +0200
From: Matthias Brugger <matthias.bgg@...il.com>
To: Rex-BC Chen <rex-bc.chen@...iatek.com>, mturquette@...libre.com,
sboyd@...nel.org, robh+dt@...nel.org,
krzysztof.kozlowski+dt@...aro.org
Cc: p.zabel@...gutronix.de, angelogioacchino.delregno@...labora.com,
chun-jie.chen@...iatek.com, wenst@...omium.org,
runyang.chen@...iatek.com, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org, linux-clk@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linux-mediatek@...ts.infradead.org,
Project_Global_Chrome_Upstream_Group@...iatek.com
Subject: Re: [PATCH v6 15/16] arm64: dts: mediatek: Add infra #reset-cells
property for MT8192
On 03/05/2022 11:38, Rex-BC Chen wrote:
> To support reset of infra, we add property of #reset-cells.
>
> Signed-off-by: Rex-BC Chen <rex-bc.chen@...iatek.com>
> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
Applied, thanks!
> ---
> arch/arm64/boot/dts/mediatek/mt8192.dtsi | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> index 411feb294613..79803420d8ef 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> @@ -269,6 +269,7 @@
> compatible = "mediatek,mt8192-infracfg", "syscon";
> reg = <0 0x10001000 0 0x1000>;
> #clock-cells = <1>;
> + #reset-cells = <1>;
> };
>
> pericfg: syscon@...03000 {
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