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Message-ID: <202206250554.HB7ustHf-lkp@intel.com>
Date: Sat, 25 Jun 2022 10:59:23 +0800
From: kernel test robot <lkp@...el.com>
To: Oded Gabbay <ogabbay@...nel.org>
Cc: kbuild-all@...ts.01.org, linux-kernel@...r.kernel.org
Subject: [ogabbay:gaudi2_full 47/48]
drivers/misc/habanalabs/goya/goya.c:474:15: error: 'struct
asic_fixed_properties' has no member named 'first_available_user_interrupt';
did you mean 'first_available_user_msix_interrupt'?
tree: https://git.kernel.org/pub/scm/linux/kernel/git/ogabbay/linux.git gaudi2_full
head: 91e0cd8151cd8592199b21f047a3915fe06ba098
commit: c71a92a79a0fb20468e485f706d7eade2c65c299 [47/48] rename first_available_user_msix_interrupt to first_available_user_interrupt
config: x86_64-randconfig-a004
compiler: gcc-11 (Debian 11.3.0-3) 11.3.0
reproduce (this is a W=1 build):
# https://git.kernel.org/pub/scm/linux/kernel/git/ogabbay/linux.git/commit/?id=c71a92a79a0fb20468e485f706d7eade2c65c299
git remote add ogabbay https://git.kernel.org/pub/scm/linux/kernel/git/ogabbay/linux.git
git fetch --no-tags ogabbay gaudi2_full
git checkout c71a92a79a0fb20468e485f706d7eade2c65c299
# save the config file
mkdir build_dir && cp config build_dir/.config
make W=1 O=build_dir ARCH=x86_64 SHELL=/bin/bash
If you fix the issue, kindly add following tag where applicable
Reported-by: kernel test robot <lkp@...el.com>
All errors (new ones prefixed by >>):
drivers/misc/habanalabs/goya/goya.c: In function 'goya_set_fixed_properties':
drivers/misc/habanalabs/goya/goya.c:392:15: error: 'struct asic_fixed_properties' has no member named 'cfg_base_address'; did you mean 'sram_base_address'?
392 | prop->cfg_base_address = CFG_BASE;
| ^~~~~~~~~~~~~~~~
| sram_base_address
drivers/misc/habanalabs/goya/goya.c:397:13: error: 'struct asic_fixed_properties' has no member named 'completion_mode'
397 | prop->completion_mode = HL_COMPLETION_MODE_JOB;
| ^~
drivers/misc/habanalabs/goya/goya.c:397:33: error: 'HL_COMPLETION_MODE_JOB' undeclared (first use in this function)
397 | prop->completion_mode = HL_COMPLETION_MODE_JOB;
| ^~~~~~~~~~~~~~~~~~~~~~
drivers/misc/habanalabs/goya/goya.c:397:33: note: each undeclared identifier is reported only once for each function it appears in
>> drivers/misc/habanalabs/goya/goya.c:474:15: error: 'struct asic_fixed_properties' has no member named 'first_available_user_interrupt'; did you mean 'first_available_user_msix_interrupt'?
474 | prop->first_available_user_interrupt = USHRT_MAX;
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
| first_available_user_msix_interrupt
drivers/misc/habanalabs/goya/goya.c: At top level:
drivers/misc/habanalabs/goya/goya.c:5260:5: warning: no previous prototype for 'goya_pre_schedule_cs' [-Wmissing-prototypes]
5260 | int goya_pre_schedule_cs(struct hl_cs *cs)
| ^~~~~~~~~~~~~~~~~~~~
drivers/misc/habanalabs/goya/goya.c:5344:5: warning: no previous prototype for 'goya_ack_mmu_page_fault_or_access_error' [-Wmissing-prototypes]
5344 | int goya_ack_mmu_page_fault_or_access_error(struct hl_device *hdev,
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
--
drivers/misc/habanalabs/gaudi/gaudi.c: In function 'gaudi_set_fixed_properties':
drivers/misc/habanalabs/gaudi/gaudi.c:585:13: error: 'struct asic_fixed_properties' has no member named 'cache_line_size'
585 | prop->cache_line_size = DEVICE_CACHE_LINE_SIZE;
| ^~
drivers/misc/habanalabs/gaudi/gaudi.c:586:15: error: 'struct asic_fixed_properties' has no member named 'cfg_base_address'; did you mean 'sram_base_address'?
586 | prop->cfg_base_address = CFG_BASE;
| ^~~~~~~~~~~~~~~~
| sram_base_address
drivers/misc/habanalabs/gaudi/gaudi.c:591:13: error: 'struct asic_fixed_properties' has no member named 'completion_mode'
591 | prop->completion_mode = HL_COMPLETION_MODE_JOB;
| ^~
drivers/misc/habanalabs/gaudi/gaudi.c:591:33: error: 'HL_COMPLETION_MODE_JOB' undeclared (first use in this function)
591 | prop->completion_mode = HL_COMPLETION_MODE_JOB;
| ^~~~~~~~~~~~~~~~~~~~~~
drivers/misc/habanalabs/gaudi/gaudi.c:591:33: note: each undeclared identifier is reported only once for each function it appears in
drivers/misc/habanalabs/gaudi/gaudi.c:618:13: error: 'struct asic_fixed_properties' has no member named 'mmu_cache_mng_addr'
618 | prop->mmu_cache_mng_addr = MMU_CACHE_MNG_ADDR;
| ^~
drivers/misc/habanalabs/gaudi/gaudi.c:619:13: error: 'struct asic_fixed_properties' has no member named 'mmu_cache_mng_size'
619 | prop->mmu_cache_mng_size = MMU_CACHE_MNG_SIZE;
| ^~
>> drivers/misc/habanalabs/gaudi/gaudi.c:688:15: error: 'struct asic_fixed_properties' has no member named 'first_available_user_interrupt'; did you mean 'first_available_user_msix_interrupt'?
688 | prop->first_available_user_interrupt = USHRT_MAX;
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
| first_available_user_msix_interrupt
In file included from drivers/misc/habanalabs/gaudi/gaudiP.h:12,
from drivers/misc/habanalabs/gaudi/gaudi.c:8:
drivers/misc/habanalabs/gaudi/gaudi.c: In function 'gaudi_mmu_init':
drivers/misc/habanalabs/gaudi/gaudi.c:3883:48: error: 'struct asic_fixed_properties' has no member named 'mmu_cache_mng_addr'
3883 | WREG32(mmSTLB_CACHE_INV_BASE_39_8, prop->mmu_cache_mng_addr >> 8);
| ^~
drivers/misc/habanalabs/gaudi/../common/habanalabs.h:2272:61: note: in definition of macro 'WREG32'
2272 | #define WREG32(reg, v) hdev->asic_funcs->wreg(hdev, (reg), (v))
| ^
drivers/misc/habanalabs/gaudi/gaudi.c:3884:49: error: 'struct asic_fixed_properties' has no member named 'mmu_cache_mng_addr'
3884 | WREG32(mmSTLB_CACHE_INV_BASE_49_40, prop->mmu_cache_mng_addr >> 40);
| ^~
drivers/misc/habanalabs/gaudi/../common/habanalabs.h:2272:61: note: in definition of macro 'WREG32'
2272 | #define WREG32(reg, v) hdev->asic_funcs->wreg(hdev, (reg), (v))
| ^
drivers/misc/habanalabs/gaudi/gaudi.c: In function 'gaudi_scrub_device_mem':
drivers/misc/habanalabs/gaudi/gaudi.c:4836:25: warning: variable 'dummy_val' set but not used [-Wunused-but-set-variable]
4836 | u64 addr, size, dummy_val;
| ^~~~~~~~~
drivers/misc/habanalabs/gaudi/gaudi.c: In function 'gaudi_mmu_clear_pgt_range':
drivers/misc/habanalabs/gaudi/gaudi.c:6082:40: error: 'struct asic_fixed_properties' has no member named 'mmu_cache_mng_size'
6082 | hdev->asic_prop.mmu_cache_mng_size;
| ^
drivers/misc/habanalabs/gaudi/gaudi.c: At top level:
drivers/misc/habanalabs/gaudi/gaudi.c:8601:5: warning: no previous prototype for 'gaudi_pre_schedule_cs' [-Wmissing-prototypes]
8601 | int gaudi_pre_schedule_cs(struct hl_cs *cs)
| ^~~~~~~~~~~~~~~~~~~~~
drivers/misc/habanalabs/gaudi/gaudi.c:8977:5: warning: no previous prototype for 'gaudi_ack_mmu_page_fault_or_access_error' [-Wmissing-prototypes]
8977 | int gaudi_ack_mmu_page_fault_or_access_error(struct hl_device *hdev,
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
vim +474 drivers/misc/habanalabs/goya/goya.c
359
360 int goya_set_fixed_properties(struct hl_device *hdev)
361 {
362 struct asic_fixed_properties *prop = &hdev->asic_prop;
363 int i;
364
365 prop->max_queues = GOYA_QUEUE_ID_SIZE;
366 prop->hw_queues_props = kcalloc(prop->max_queues,
367 sizeof(struct hw_queue_properties),
368 GFP_KERNEL);
369
370 if (!prop->hw_queues_props)
371 return -ENOMEM;
372
373 for (i = 0 ; i < NUMBER_OF_EXT_HW_QUEUES ; i++) {
374 prop->hw_queues_props[i].type = QUEUE_TYPE_EXT;
375 prop->hw_queues_props[i].driver_only = 0;
376 prop->hw_queues_props[i].cb_alloc_flags = CB_ALLOC_KERNEL;
377 }
378
379 for (; i < NUMBER_OF_EXT_HW_QUEUES + NUMBER_OF_CPU_HW_QUEUES ; i++) {
380 prop->hw_queues_props[i].type = QUEUE_TYPE_CPU;
381 prop->hw_queues_props[i].driver_only = 1;
382 prop->hw_queues_props[i].cb_alloc_flags = CB_ALLOC_KERNEL;
383 }
384
385 for (; i < NUMBER_OF_EXT_HW_QUEUES + NUMBER_OF_CPU_HW_QUEUES +
386 NUMBER_OF_INT_HW_QUEUES; i++) {
387 prop->hw_queues_props[i].type = QUEUE_TYPE_INT;
388 prop->hw_queues_props[i].driver_only = 0;
389 prop->hw_queues_props[i].cb_alloc_flags = CB_ALLOC_USER;
390 }
391
392 prop->cfg_base_address = CFG_BASE;
393 prop->device_dma_offset_for_host_access = HOST_PHYS_BASE;
394 prop->host_base_address = HOST_PHYS_BASE;
395 prop->host_end_address = prop->host_base_address + HOST_PHYS_SIZE;
396 prop->completion_queues_count = NUMBER_OF_CMPLT_QUEUES;
397 prop->completion_mode = HL_COMPLETION_MODE_JOB;
398 prop->dram_base_address = DRAM_PHYS_BASE;
399 prop->dram_size = DRAM_PHYS_DEFAULT_SIZE;
400 prop->dram_end_address = prop->dram_base_address + prop->dram_size;
401 prop->dram_user_base_address = DRAM_BASE_ADDR_USER;
402
403 prop->sram_base_address = SRAM_BASE_ADDR;
404 prop->sram_size = SRAM_SIZE;
405 prop->sram_end_address = prop->sram_base_address + prop->sram_size;
406 prop->sram_user_base_address = prop->sram_base_address +
407 SRAM_USER_BASE_OFFSET;
408
409 prop->mmu_pgt_addr = MMU_PAGE_TABLES_ADDR;
410 prop->mmu_dram_default_page_addr = MMU_DRAM_DEFAULT_PAGE_ADDR;
411 if (hdev->pldm)
412 prop->mmu_pgt_size = 0x800000; /* 8MB */
413 else
414 prop->mmu_pgt_size = MMU_PAGE_TABLES_SIZE;
415 prop->mmu_pte_size = HL_PTE_SIZE;
416 prop->mmu_hop_table_size = HOP_TABLE_SIZE_512_PTE;
417 prop->mmu_hop0_tables_total_size = HOP0_512_PTE_TABLES_TOTAL_SIZE;
418 prop->dram_page_size = PAGE_SIZE_2MB;
419 prop->device_mem_alloc_default_page_size = prop->dram_page_size;
420 prop->dram_supports_virtual_memory = true;
421
422 prop->dmmu.hop_shifts[MMU_HOP0] = MMU_V1_0_HOP0_SHIFT;
423 prop->dmmu.hop_shifts[MMU_HOP1] = MMU_V1_0_HOP1_SHIFT;
424 prop->dmmu.hop_shifts[MMU_HOP2] = MMU_V1_0_HOP2_SHIFT;
425 prop->dmmu.hop_shifts[MMU_HOP3] = MMU_V1_0_HOP3_SHIFT;
426 prop->dmmu.hop_shifts[MMU_HOP4] = MMU_V1_0_HOP4_SHIFT;
427 prop->dmmu.hop_masks[MMU_HOP0] = MMU_V1_0_HOP0_MASK;
428 prop->dmmu.hop_masks[MMU_HOP1] = MMU_V1_0_HOP1_MASK;
429 prop->dmmu.hop_masks[MMU_HOP2] = MMU_V1_0_HOP2_MASK;
430 prop->dmmu.hop_masks[MMU_HOP3] = MMU_V1_0_HOP3_MASK;
431 prop->dmmu.hop_masks[MMU_HOP4] = MMU_V1_0_HOP4_MASK;
432 prop->dmmu.start_addr = VA_DDR_SPACE_START;
433 prop->dmmu.end_addr = VA_DDR_SPACE_END;
434 prop->dmmu.page_size = PAGE_SIZE_2MB;
435 prop->dmmu.num_hops = MMU_ARCH_5_HOPS;
436 prop->dmmu.last_mask = LAST_MASK;
437 /* TODO: will be duplicated until implementing per-MMU props */
438 prop->dmmu.hop_table_size = prop->mmu_hop_table_size;
439 prop->dmmu.hop0_tables_total_size = prop->mmu_hop0_tables_total_size;
440
441 /* shifts and masks are the same in PMMU and DMMU */
442 memcpy(&prop->pmmu, &prop->dmmu, sizeof(prop->dmmu));
443 prop->pmmu.start_addr = VA_HOST_SPACE_START;
444 prop->pmmu.end_addr = VA_HOST_SPACE_END;
445 prop->pmmu.page_size = PAGE_SIZE_4KB;
446 prop->pmmu.num_hops = MMU_ARCH_5_HOPS;
447 prop->pmmu.last_mask = LAST_MASK;
448 /* TODO: will be duplicated until implementing per-MMU props */
449 prop->pmmu.hop_table_size = prop->mmu_hop_table_size;
450 prop->pmmu.hop0_tables_total_size = prop->mmu_hop0_tables_total_size;
451
452 /* PMMU and HPMMU are the same except of page size */
453 memcpy(&prop->pmmu_huge, &prop->pmmu, sizeof(prop->pmmu));
454 prop->pmmu_huge.page_size = PAGE_SIZE_2MB;
455
456 prop->dram_size_for_default_page_mapping = VA_DDR_SPACE_END;
457 prop->cfg_size = CFG_SIZE;
458 prop->max_asid = MAX_ASID;
459 prop->num_of_events = GOYA_ASYNC_EVENT_ID_SIZE;
460 prop->high_pll = PLL_HIGH_DEFAULT;
461 prop->cb_pool_cb_cnt = GOYA_CB_POOL_CB_CNT;
462 prop->cb_pool_cb_size = GOYA_CB_POOL_CB_SIZE;
463 prop->max_power_default = MAX_POWER_DEFAULT;
464 prop->dc_power_default = DC_POWER_DEFAULT;
465 prop->tpc_enabled_mask = TPC_ENABLED_MASK;
466 prop->pcie_dbi_base_address = mmPCIE_DBI_BASE;
467 prop->pcie_aux_dbi_reg_addr = CFG_BASE + mmPCIE_AUX_DBI;
468
469 strncpy(prop->cpucp_info.card_name, GOYA_DEFAULT_CARD_NAME,
470 CARD_NAME_MAX_LEN);
471
472 prop->max_pending_cs = GOYA_MAX_PENDING_CS;
473
> 474 prop->first_available_user_interrupt = USHRT_MAX;
475
476 for (i = 0 ; i < HL_MAX_DCORES ; i++)
477 prop->first_available_cq[i] = USHRT_MAX;
478
479 prop->fw_cpu_boot_dev_sts0_valid = false;
480 prop->fw_cpu_boot_dev_sts1_valid = false;
481 prop->hard_reset_done_by_fw = false;
482 prop->gic_interrupts_enable = true;
483
484 prop->server_type = HL_SERVER_TYPE_UNKNOWN;
485
486 prop->clk_pll_index = HL_GOYA_MME_PLL;
487
488 prop->use_get_power_for_reset_history = true;
489
490 prop->configurable_stop_on_err = true;
491
492 prop->set_max_power_on_device_init = true;
493
494 prop->dma_mask = 48;
495
496 return 0;
497 }
498
--
0-DAY CI Kernel Test Service
https://01.org/lkp
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