linux-kernel - [PATCH v1 0/9] reset: replace reset-lantiq with reset-intel-gw

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Message-Id: <20220628124441.2385023-1-martin.blumenstingl@googlemail.com>
Date:   Tue, 28 Jun 2022 14:44:32 +0200
From:   Martin Blumenstingl <martin.blumenstingl@...glemail.com>
To:     linux-phy@...ts.infradead.org, devicetree@...r.kernel.org,
        p.zabel@...gutronix.de
Cc:     linux-kernel@...r.kernel.org, linux-mips@...r.kernel.org,
        vkoul@...nel.org, kishon@...com, rtanwar@...linear.com,
        Martin Blumenstingl <martin.blumenstingl@...glemail.com>
Subject: [PATCH v1 0/9] reset: replace reset-lantiq with reset-intel-gw

Hello,

in the discussion when the reset-intel-gw driver was added it came up
that the IP in the Intel LGM SoCs is backwards compatible with the older
Lantiq SoCs. This series removes the reset-lantiq driver and replaces it
with the reset-intel-gw driver.

The transition is relatively straight forward:
- compatible strings from the old bindings (from
  Documentation/devicetree/bindings/mips/lantiq/rcu.txt) are moved over
  to intel,rcu-gw.yaml
- missing compatible strings (for Amazon-SE, Danube and xRX100) are
  added directly to intel,rcu-gw.yaml
- update the driver to map the registers using syscon on legacy SoCs as
  some RCU registers are shared with various peripherals (there's nested
  USB PHYs and other peripherals have endianness configuration registers
  in the RCU register space)
- update the .dts(i) files (I already prepared patches for downstream
  OpenWrt, which is the only known user of these SoCs)

Patch #3 (dt-bindings for the reset controller) depends on patch #1
(dt-bindings for the USB2 PHYs). I think it would be easiest to also
take patch #1 through the reset tree since it's a simple txt -> yaml
conversion.
If needed I can send patch #9 separately so it can go through the MIPS
tree.

PS: I Cc'ed Rahul Tanwar who has previously stepped up as a maintainer
for the drivers on the Intel LGM SoCs, which is where the reset-intel-gw
driver was introduced. He's now with MaxLinear who took over Intel's
AnyWAN department (where the LGM SoCs were developed) in 2020.


Martin Blumenstingl (9):
  dt-bindings: phy: lantiq: xway-rcu-usb2-phy: Convert to YAML
  dt-bindings: reset: intel,rcu-gw: Allow up to three global reset items
  dt-bindings: reset: intel,rcu-gw: Update bindings for "legacy" SoCs
  dt-bindings: mips: lantiq: rcu: Remove binding documentation
  reset: intel: Allow enabling the driver on "LANTIQ" (MIPS) platforms
  reset: intel: Add and update compatible strings Lantiq SoCs
  reset: intel: Use syscon_node_to_regmap on legacy SoCs
  reset: lantiq: Remove driver as it has been replaced by reset-intel-gw
  mips: dts: lantiq: Update the RCU node to match the intel,rcu-gw
    binding

 .../devicetree/bindings/mips/lantiq/rcu.txt   |  69 ------
 .../phy/lantiq,xway-rcu-usb2-phy.yaml         |  68 ++++++
 .../bindings/phy/phy-lantiq-rcu-usb2.txt      |  40 ----
 .../bindings/reset/intel,rcu-gw.yaml          |  88 +++++++-
 arch/mips/boot/dts/lantiq/danube.dtsi         |  20 +-
 drivers/reset/Kconfig                         |  11 +-
 drivers/reset/Makefile                        |   1 -
 drivers/reset/reset-intel-gw.c                |  36 ++-
 drivers/reset/reset-lantiq.c                  | 210 ------------------
 9 files changed, 197 insertions(+), 346 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/mips/lantiq/rcu.txt
 create mode 100644 Documentation/devicetree/bindings/phy/lantiq,xway-rcu-usb2-phy.yaml
 delete mode 100644 Documentation/devicetree/bindings/phy/phy-lantiq-rcu-usb2.txt
 delete mode 100644 drivers/reset/reset-lantiq.c

-- 
2.36.1