linux-kernel - [PATCH v1 2/9] dt-bindings: reset: intel,rcu-gw: Allow up to three global reset items

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Message-Id: <20220628124441.2385023-3-martin.blumenstingl@googlemail.com>
Date:   Tue, 28 Jun 2022 14:44:34 +0200
From:   Martin Blumenstingl <martin.blumenstingl@...glemail.com>
To:     linux-phy@...ts.infradead.org, devicetree@...r.kernel.org,
        p.zabel@...gutronix.de
Cc:     linux-kernel@...r.kernel.org, linux-mips@...r.kernel.org,
        vkoul@...nel.org, kishon@...com, rtanwar@...linear.com,
        Martin Blumenstingl <martin.blumenstingl@...glemail.com>
Subject: [PATCH v1 2/9] dt-bindings: reset: intel,rcu-gw: Allow up to three global reset items

Legacy SoCs use three elements for the global reset:
- offset
- reset bit
- status bit

Allow this in the dt-bindings as well.

Fixes: b7ab0cb00d086b ("dt-bindings: reset: Add YAML schemas for the Intel Reset controller")
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@...glemail.com>
---
 Documentation/devicetree/bindings/reset/intel,rcu-gw.yaml | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/Documentation/devicetree/bindings/reset/intel,rcu-gw.yaml b/Documentation/devicetree/bindings/reset/intel,rcu-gw.yaml
index 13bf6bb3f097..be64f8597710 100644
--- a/Documentation/devicetree/bindings/reset/intel,rcu-gw.yaml
+++ b/Documentation/devicetree/bindings/reset/intel,rcu-gw.yaml
@@ -22,11 +22,15 @@ properties:
   intel,global-reset:
     description: Global reset register offset and bit offset.
     $ref: /schemas/types.yaml#/definitions/uint32-array
+    minItems: 2
     items:
       - description: Register offset
       - description: Register bit offset
         minimum: 0
         maximum: 31
+      - description: Status bit offset (only if "#reset-cells" is 3)
+        minimum: 0
+        maximum: 31
 
   "#reset-cells":
     minimum: 2
-- 
2.36.1