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Message-ID: <20220628193719.GA852253-robh@kernel.org>
Date: Tue, 28 Jun 2022 13:37:19 -0600
From: Rob Herring <robh@...nel.org>
To: Bharat Kumar Gogada <bharat.kumar.gogada@...inx.com>
Cc: linux-kernel@...r.kernel.org, michals@...inx.com,
bhelgaas@...gle.com, devicetree@...r.kernel.org,
linux-pci@...r.kernel.org, lorenzo.pieralisi@....com
Subject: Re: [PATCH v5 1/2] dt-bindings: PCI: xilinx-cpm: Add Versal CPM5
Root Port
On Tue, 21 Jun 2022 17:06:52 +0530, Bharat Kumar Gogada wrote:
> Xilinx Versal Premium series has CPM5 block which supports Root Port
> functionality at Gen5 speed.
>
> Add support for YAML schemas documentation for Versal CPM5 Root Port driver.
>
> Signed-off-by: Bharat Kumar Gogada <bharat.kumar.gogada@...inx.com>
> ---
> .../bindings/pci/xilinx-versal-cpm.yaml | 38 ++++++++++++++++++-
> 1 file changed, 37 insertions(+), 1 deletion(-)
>
Reviewed-by: Rob Herring <robh@...nel.org>
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