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Message-ID: <7d1fe567-6dd7-a6e0-08bf-225e8d515931@quicinc.com>
Date: Wed, 29 Jun 2022 16:51:25 +0530
From: Rajendra Nayak <quic_rjendra@...cinc.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
Andy Gross <agross@...nel.org>,
Bjorn Andersson <bjorn.andersson@...aro.org>,
"Georgi Djakov" <djakov@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Catalin Marinas <catalin.marinas@....com>,
Will Deacon <will@...nel.org>, <linux-arm-msm@...r.kernel.org>,
<linux-pm@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>
CC: Rob Herring <robh@...nel.org>
Subject: Re: [PATCH v5 1/4] dt-bindings: interconnect: qcom,msm8998-cpu-bwmon:
add BWMON device
> This BWMON device sits between
> CPU and Last Level Cache Controller.
[]...
> +properties:
> + compatible:
> + oneOf:
> + - items:
> + - enum:
> + - qcom,sdm845-cpu-bwmon
should this be qcom,sdm845-llcc-bwmon instead since it actually
tells us the llcc bw values?
That way perhaps the other one between llcc and DDR can be
qcom,sdm845-ddr-bwmon.
> + - const: qcom,msm8998-cpu-bwmon
> + - const: qcom,msm8998-cpu-bwmon # BWMON v4
> +
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