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Message-ID: <76b8819f-df55-8b81-7f80-90d0694400d4@linaro.org>
Date: Wed, 29 Jun 2022 13:22:14 +0200
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Rajendra Nayak <quic_rjendra@...cinc.com>,
Andy Gross <agross@...nel.org>,
Bjorn Andersson <bjorn.andersson@...aro.org>,
Georgi Djakov <djakov@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Catalin Marinas <catalin.marinas@....com>,
Will Deacon <will@...nel.org>, linux-arm-msm@...r.kernel.org,
linux-pm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org
Cc: Rob Herring <robh@...nel.org>
Subject: Re: [PATCH v5 1/4] dt-bindings: interconnect: qcom,msm8998-cpu-bwmon:
add BWMON device
On 29/06/2022 13:21, Rajendra Nayak wrote:
>
>> This BWMON device sits between
>> CPU and Last Level Cache Controller.
>
> []...
>
>> +properties:
>> + compatible:
>> + oneOf:
>> + - items:
>> + - enum:
>> + - qcom,sdm845-cpu-bwmon
>
> should this be qcom,sdm845-llcc-bwmon instead since it actually
> tells us the llcc bw values?
> That way perhaps the other one between llcc and DDR can be
> qcom,sdm845-ddr-bwmon.
>
Good point, thanks. I'll change it.
Best regards,
Krzysztof
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