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Date: Wed, 29 Jun 2022 13:32:02 +0200 From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org> To: Rajendra Nayak <quic_rjendra@...cinc.com>, Andy Gross <agross@...nel.org>, Bjorn Andersson <bjorn.andersson@...aro.org>, Georgi Djakov <djakov@...nel.org>, Rob Herring <robh+dt@...nel.org>, Catalin Marinas <catalin.marinas@....com>, Will Deacon <will@...nel.org>, linux-arm-msm@...r.kernel.org, linux-pm@...r.kernel.org, devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org Cc: Thara Gopinath <thara.gopinath@...il.com> Subject: Re: [PATCH v5 4/4] arm64: dts: qcom: sdm845: Add CPU BWMON On 29/06/2022 13:22, Rajendra Nayak wrote: > > > On 6/29/2022 1:22 PM, Krzysztof Kozlowski wrote: >> Add device node for CPU-memory BWMON device (bandwidth monitoring) on >> SDM845 measuring bandwidth between CPU (gladiator_noc) and Last Level >> Cache (memnoc). Usage of this BWMON allows to remove fixed bandwidth >> votes from cpufreq (CPU nodes) thus achieve high memory throughput even >> with lower CPU frequencies. >> >> Co-developed-by: Thara Gopinath <thara.gopinath@...il.com> >> Signed-off-by: Thara Gopinath <thara.gopinath@...il.com> >> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org> >> --- >> arch/arm64/boot/dts/qcom/sdm845.dtsi | 38 ++++++++++++++++++++++++++++ >> 1 file changed, 38 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi >> index 83e8b63f0910..e0f088996390 100644 >> --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi >> +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi >> @@ -2026,6 +2026,44 @@ llcc: system-cache-controller@...0000 { >> interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>; >> }; >> >> + pmu@...6400 { >> + compatible = "qcom,sdm845-cpu-bwmon", "qcom,msm8998-cpu-bwmon"; >> + reg = <0 0x01436400 0 0x600>; >> + interrupts = <GIC_SPI 581 IRQ_TYPE_LEVEL_HIGH>; >> + interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_LLCC 3>; >> + >> + operating-points-v2 = <&cpu_bwmon_opp_table>; >> + >> + cpu_bwmon_opp_table: opp-table { >> + compatible = "operating-points-v2"; >> + >> + /* >> + * The interconnect paths bandwidths taken from >> + * cpu4_opp_table bandwidth. >> + * They also match different tables from >> + * msm-4.9 downstream kernel: >> + * - the OSM L3 from bandwidth table of >> + * qcom,cpu4-l3lat-mon (qcom,core-dev-table); >> + * bus width: 16 bytes; >> + */ > > Maybe the comment needs an update? Yes, a bit. Best regards, Krzysztof
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