linux-kernel - Re: [PATCH v6 2/5] irqchip: Add RZ/G2L IA55 Interrupt Controller driver

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Message-ID: <CA+V-a8vHZC8DZqJ57WuEeqne09+AB5Z-oLc9aXitp8VxRSV6Lw@mail.gmail.com>
Date:   Thu, 30 Jun 2022 06:40:21 +0100
From:   "Lad, Prabhakar" <prabhakar.csengg@...il.com>
To:     Philipp Zabel <p.zabel@...gutronix.de>
Cc:     Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>,
        Marc Zyngier <maz@...nel.org>,
        Thomas Gleixner <tglx@...utronix.de>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Geert Uytterhoeven <geert+renesas@...der.be>,
        Linus Walleij <linus.walleij@...aro.org>,
        Bartosz Golaszewski <brgl@...ev.pl>,
        "open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>,
        Linux-Renesas <linux-renesas-soc@...r.kernel.org>,
        "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
        <devicetree@...r.kernel.org>, LKML <linux-kernel@...r.kernel.org>,
        Biju Das <biju.das.jz@...renesas.com>
Subject: Re: [PATCH v6 2/5] irqchip: Add RZ/G2L IA55 Interrupt Controller driver

Hi Philipp,

Thank you for the review.

On Wed, Jun 29, 2022 at 5:29 PM Philipp Zabel <p.zabel@...gutronix.de> wrote:
>
> On Sa, 2022-06-25 at 21:05 +0100, Lad Prabhakar wrote:
> > Add a driver for the Renesas RZ/G2L Interrupt Controller.
> >
> > This supports external pins being used as interrupts. It supports
> > one line for NMI, 8 external pins and 32 GPIO pins (out of 123)
> > to be used as IRQ lines.
> >
> > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
> > ---
> >  drivers/irqchip/Kconfig             |   8 +
> >  drivers/irqchip/Makefile            |   1 +
> >  drivers/irqchip/irq-renesas-rzg2l.c | 393 ++++++++++++++++++++++++++++
> >  3 files changed, 402 insertions(+)
> >  create mode 100644 drivers/irqchip/irq-renesas-rzg2l.c
> >
> [...]
> > diff --git a/drivers/irqchip/irq-renesas-rzg2l.c b/drivers/irqchip/irq-renesas-rzg2l.c
> > new file mode 100644
> > index 000000000000..cc16fcf2bbc6
> > --- /dev/null
> > +++ b/drivers/irqchip/irq-renesas-rzg2l.c
> > @@ -0,0 +1,393 @@
> [...]
> > +static int rzg2l_irqc_init(struct device_node *node, struct device_node *parent)
> > +{
> > +     struct irq_domain *irq_domain, *parent_domain;
> > +     struct platform_device *pdev;
> > +     struct reset_control *resetn;
> > +     struct rzg2l_irqc_priv *priv;
> > +     int ret;
> > +
> > +     pdev = of_find_device_by_node(node);
> > +     if (!pdev)
> > +             return -ENODEV;
> > +
> > +     parent_domain = irq_find_host(parent);
> > +     if (!parent_domain) {
> > +             dev_err(&pdev->dev, "cannot find parent domain\n");
> > +             return -ENODEV;
> > +     }
> > +
> > +     priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
> > +     if (!priv)
> > +             return -ENOMEM;
> > +
> > +     priv->base = devm_of_iomap(&pdev->dev, pdev->dev.of_node, 0, NULL);
> > +     if (IS_ERR(priv->base))
> > +             return PTR_ERR(priv->base);
> > +
> > +     ret = rzg2l_irqc_parse_interrupts(priv, node);
> > +     if (ret) {
> > +             dev_err(&pdev->dev, "cannot parse interrupts: %d\n", ret);
> > +             return ret;
> > +     }
> > +
> > +     resetn = devm_reset_control_get_exclusive_by_index(&pdev->dev, 0);
>
> Why is this by index? I'd expect
>
>         resetn = devm_reset_control_get_exclusive(&pdev->dev, NULL);
>
> should work just as well?
>
Agreed will replace it to devm_reset_control_get_exclusive().

Cheers,
Prabhakar