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Message-Id: <20220701144946.2528972-3-linux@roeck-us.net>
Date:   Fri,  1 Jul 2022 07:49:45 -0700
From:   Guenter Roeck <linux@...ck-us.net>
To:     Huacai Chen <chenhuacai@...nel.org>
Cc:     WANG Xuerui <kernel@...0n.name>, Guo Ren <guoren@...nel.org>,
        loongarch@...ts.linux.dev, linux-kernel@...r.kernel.org,
        Guenter Roeck <linux@...ck-us.net>
Subject: [RFC PATCH 2/3] LoongArch: Do not include file from toolchain

Building loongarch:allnoconfig with a self-compiled toolchain fails
with the following error.

./arch/loongarch/include/asm/loongarch.h:13:10: fatal error:
	larchintrin.h: No such file or directory

loongarch.h includes a file from the toolchain which is not neccessarily
available. Drop the include, and call the builtin functions directly.

Fixes: f2ac457a6138 ("LoongArch: Add CPU definition headers")
Signed-off-by: Guenter Roeck <linux@...ck-us.net>
---
RFC: If the builtins are compiler or compiler version specific,
     a separate include file may be needed. Either case, the kernel
     should not include files from the toolchain.

 arch/loongarch/include/asm/loongarch.h | 23 +++++++++++------------
 1 file changed, 11 insertions(+), 12 deletions(-)

diff --git a/arch/loongarch/include/asm/loongarch.h b/arch/loongarch/include/asm/loongarch.h
index 3ba4f7e87cd2..df57f88b2fc5 100644
--- a/arch/loongarch/include/asm/loongarch.h
+++ b/arch/loongarch/include/asm/loongarch.h
@@ -10,7 +10,6 @@
 #include <linux/types.h>
 
 #ifndef __ASSEMBLY__
-#include <larchintrin.h>
 
 /*
  * parse_r var, r - Helper assembler macro for parsing register names.
@@ -58,7 +57,7 @@ __asm__(".macro	parse_r var r\n\t"
 /* CPUCFG */
 static inline u32 read_cpucfg(u32 reg)
 {
-	return __cpucfg(reg);
+	return __builtin_loongarch_cpucfg(reg);
 }
 
 #endif /* !__ASSEMBLY__ */
@@ -229,53 +228,53 @@ static inline u32 read_cpucfg(u32 reg)
 /* CSR */
 static __always_inline u32 csr_read32(u32 reg)
 {
-	return __csrrd_w(reg);
+	return __builtin_loongarch_csrrd_d(reg);
 }
 
 static __always_inline u64 csr_read64(u32 reg)
 {
-	return __csrrd_d(reg);
+	return __builtin_loongarch_csrrd_d(reg);
 }
 
 static __always_inline void csr_write32(u32 val, u32 reg)
 {
-	__csrwr_w(val, reg);
+	__builtin_loongarch_csrwr_w(val, reg);
 }
 
 static __always_inline void csr_write64(u64 val, u32 reg)
 {
-	__csrwr_d(val, reg);
+	__builtin_loongarch_csrwr_d(val, reg);
 }
 
 static __always_inline u32 csr_xchg32(u32 val, u32 mask, u32 reg)
 {
-	return __csrxchg_w(val, mask, reg);
+	return __builtin_loongarch_csrxchg_w(val, mask, reg);
 }
 
 static __always_inline u64 csr_xchg64(u64 val, u64 mask, u32 reg)
 {
-	return __csrxchg_d(val, mask, reg);
+	return __builtin_loongarch_csrxchg_d(val, mask, reg);
 }
 
 /* IOCSR */
 static __always_inline u32 iocsr_read32(u32 reg)
 {
-	return __iocsrrd_w(reg);
+	return __builtin_loongarch_iocsrrd_w(reg);
 }
 
 static __always_inline u64 iocsr_read64(u32 reg)
 {
-	return __iocsrrd_d(reg);
+	return __builtin_loongarch_iocsrrd_d(reg);
 }
 
 static __always_inline void iocsr_write32(u32 val, u32 reg)
 {
-	__iocsrwr_w(val, reg);
+	__builtin_loongarch_iocsrwr_w(val, reg);
 }
 
 static __always_inline void iocsr_write64(u64 val, u32 reg)
 {
-	__iocsrwr_d(val, reg);
+	__builtin_loongarch_iocsrwr_d(val, reg);
 }
 
 #endif /* !__ASSEMBLY__ */
-- 
2.35.1

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