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Message-Id: <20220701145133.1152387-4-wenst@chromium.org>
Date: Fri, 1 Jul 2022 22:51:33 +0800
From: Chen-Yu Tsai <wenst@...omium.org>
To: Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>
Cc: Chen-Yu Tsai <wenst@...omium.org>,
Matthias Brugger <matthias.bgg@...il.com>,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@...labora.com>,
Rex-BC Chen <rex-bc.chen@...iatek.com>,
Chun-Jie Chen <chun-jie.chen@...iatek.com>,
linux-clk@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-mediatek@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: [PATCH 3/3] clk: mediatek: mt8183-mfgcfg: Simplify with mtk_clk_simple_*()
mtk_clk_simple_*() was added after the MT8183 clock drivers were merged.
They provide shared boiler plate for clock providers that only have
clock gates.
Since the MFGCFG block needs its power domain enabled, it can't be
completely converted to using the functions.
Simplify the MT8183 mfgcfg clock driver using mtk_clk_simple_*(),
enabling runtime PM at the same time as before. This also adds proper
driver removal support.
Since the mtk_clk_simple_probe() function allocates the clk_hw pointer
array based on .num_clks given, it effectively requires there are no
holes in the clock ID map. Check that the size of the array matches
the number of clocks with a static assertion.
Signed-off-by: Chen-Yu Tsai <wenst@...omium.org>
---
drivers/clk/mediatek/clk-mt8183-mfgcfg.c | 23 +++++++++++++----------
1 file changed, 13 insertions(+), 10 deletions(-)
diff --git a/drivers/clk/mediatek/clk-mt8183-mfgcfg.c b/drivers/clk/mediatek/clk-mt8183-mfgcfg.c
index d774edaf760b..61a3d02e44f5 100644
--- a/drivers/clk/mediatek/clk-mt8183-mfgcfg.c
+++ b/drivers/clk/mediatek/clk-mt8183-mfgcfg.c
@@ -26,28 +26,31 @@ static const struct mtk_gate mfg_clks[] = {
GATE_MFG(CLK_MFG_BG3D, "mfg_bg3d", "mfg_sel", 0)
};
-static int clk_mt8183_mfg_probe(struct platform_device *pdev)
-{
- struct clk_hw_onecell_data *clk_data;
- struct device_node *node = pdev->dev.of_node;
+static_assert(ARRAY_SIZE(mfg_clks) == CLK_MFG_NR_CLK);
- pm_runtime_enable(&pdev->dev);
+static const struct mtk_clk_desc mfg_desc = {
+ .clks = mfg_clks,
+ .num_clks = ARRAY_SIZE(mfg_clks),
+};
- clk_data = mtk_alloc_clk_data(CLK_MFG_NR_CLK);
+static int clk_mt8183_mfg_probe(struct platform_device *pdev)
+{
+ int ret = devm_pm_runtime_enable(&pdev->dev);
- mtk_clk_register_gates_with_dev(node, mfg_clks, ARRAY_SIZE(mfg_clks),
- clk_data, &pdev->dev);
+ if (ret)
+ return ret;
- return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
+ return mtk_clk_simple_probe(pdev);
}
static const struct of_device_id of_match_clk_mt8183_mfg[] = {
- { .compatible = "mediatek,mt8183-mfgcfg", },
+ { .compatible = "mediatek,mt8183-mfgcfg", .data = &mfg_desc },
{}
};
static struct platform_driver clk_mt8183_mfg_drv = {
.probe = clk_mt8183_mfg_probe,
+ .remove = mtk_clk_simple_remove,
.driver = {
.name = "clk-mt8183-mfg",
.of_match_table = of_match_clk_mt8183_mfg,
--
2.37.0.rc0.161.g10f37bed90-goog
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