linux-kernel - Re: [PATCH] MIPS: smp-mt: enable all hardware interrupts on second VPE

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Message-ID: <3c9a032edd0fb9b9608ad3ca08d6e3cc38f21464.camel@svanheule.net>
Date:   Sun, 03 Jul 2022 20:15:11 +0200
From:   Sander Vanheule <sander@...nheule.net>
To:     Aleksander Jan Bajkowski <olek2@...pl>
Cc:     Marc Zyngier <maz@...nel.org>, tsbogend@...ha.franken.de,
        martin.blumenstingl@...glemail.com, hauke@...ke-m.de,
        git@...ger-koblitz.de, linux-mips@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH] MIPS: smp-mt: enable all hardware interrupts on second
 VPE

Hi Aleksander,

Since this is IRQ related: +CC Marc Zyngier

On Sat, 2022-07-02 at 21:07 +0200, Aleksander Jan Bajkowski wrote:
> This patch is needed to handle interrupts by the second VPE on
> the Lantiq xRX200, xRX300 and xRX330 SoCs. In these chips, 32 ICU
> interrupts are connected to each hardware line. The SoC supports
> a total of 160 interrupts. Currently changing smp_affinity to the
> second VPE hangs interrupts.
> 
> This problem affects multithreaded SoCs with a custom interrupt
> controller. Chips with 1004Kc core and newer use the MIPS GIC.
> 
> Also CC'ed Birger Koblitz and Sander Vanheule. Both are working
> on support for Realtek RTL930x chips with 34Kc core and Birger
> has added a patch in OpenWRT that also enables all interrupt
> lines. So it looks like this patch is useful for more SoCs.
> 
> Tested on lantiq xRX200 and xRX330.
> 
> Signed-off-by: Aleksander Jan Bajkowski <olek2@...pl>

Thanks for bringing up this issue. Like you say OpenWrt carries a similar patch, and I also carry a
patch on my tree to enable all CPU IRQ lines.

Indiscriminately enabling all IRQ lines doesn't sit quite right with me though, since I would expect
these to be enabled on-demand. I.e. when a peripheral requests an IRQ, or when an IRQ controller is
cascaded into one of the CPU's interrupt lines. If I understand correctly, the IRQ mask/unmask
functions in drivers/irqchip/irq-mips-cpu.c should do this.

I haven't been able to achieve this (automatic) behaviour until now, so I think I must be doing
something wrong when trying to cascade the SoC IRQ driver for the RTL839x/RTL930x chips into both
VPEs. It is currently not clear to me how this should be made functional without a patch like this
one, so I hope we'll be able to clear that up now.

Best,
Sander

> ---
>  arch/mips/kernel/smp-mt.c | 3 +--
>  1 file changed, 1 insertion(+), 2 deletions(-)
> 
> diff --git a/arch/mips/kernel/smp-mt.c b/arch/mips/kernel/smp-mt.c
> index 5f04a0141068..f21cd0eb1fa7 100644
> --- a/arch/mips/kernel/smp-mt.c
> +++ b/arch/mips/kernel/smp-mt.c
> @@ -113,8 +113,7 @@ static void vsmp_init_secondary(void)
>                                          STATUSF_IP4 | STATUSF_IP5 |
>                                          STATUSF_IP6 | STATUSF_IP7);
>         else
> -               change_c0_status(ST0_IM, STATUSF_IP0 | STATUSF_IP1 |
> -                                        STATUSF_IP6 | STATUSF_IP7);
> +               set_c0_status(ST0_IM);
>  }
>  
>  static void vsmp_smp_finish(void)