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Message-Id: <20220704143554.1180927-1-robimarko@gmail.com>
Date: Mon, 4 Jul 2022 16:35:53 +0200
From: Robert Marko <robimarko@...il.com>
To: ulf.hansson@...aro.org, robh+dt@...nel.org,
krzysztof.kozlowski+dt@...aro.org, agross@...nel.org,
bjorn.andersson@...aro.org, konrad.dybcio@...ainline.org,
bhupesh.sharma@...aro.org, linux-mmc@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-msm@...r.kernel.org
Cc: Robert Marko <robimarko@...il.com>
Subject: [PATCH v2 1/2] dt-bindings: mmc: sdhci-msm: document resets
Commit "mmc: sdhci-msm: Reset GCC_SDCC_BCR register for SDHC" added
support for utilizing a hardware reset and parsing it from DT, however
the bindings were not updated along with it.
So, document the usage of "resets" property with the limit of only one
item.
Signed-off-by: Robert Marko <robimarko@...il.com>
---
Documentation/devicetree/bindings/mmc/sdhci-msm.yaml | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
index 31a3ce208e1a..ca8814a80443 100644
--- a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
+++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
@@ -116,6 +116,9 @@ properties:
description:
Should specify pin control groups used for this controller.
+ resets:
+ maxItems: 1
+
qcom,ddr-config:
$ref: /schemas/types.yaml#/definitions/uint32
description: platform specific settings for DDR_CONFIG reg.
--
2.36.1
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