linux-kernel - [PATCH v2 2/2] arm64: dts: ipq8074: add reset to SDHCI

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Message-Id: <20220704143554.1180927-2-robimarko@gmail.com>
Date:   Mon,  4 Jul 2022 16:35:54 +0200
From:   Robert Marko <robimarko@...il.com>
To:     ulf.hansson@...aro.org, robh+dt@...nel.org,
        krzysztof.kozlowski+dt@...aro.org, agross@...nel.org,
        bjorn.andersson@...aro.org, konrad.dybcio@...ainline.org,
        bhupesh.sharma@...aro.org, linux-mmc@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-arm-msm@...r.kernel.org
Cc:     Robert Marko <robimarko@...il.com>
Subject: [PATCH v2 2/2] arm64: dts: ipq8074: add reset to SDHCI

Add reset to SDHCI controller so it can be reset to avoid timeout issues
after software reset due to bootloader set configuration.

Signed-off-by: Robert Marko <robimarko@...il.com>
---
 arch/arm64/boot/dts/qcom/ipq8074.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
index ddafc7de6c5f..d685ca1969a3 100644
--- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
@@ -482,6 +482,7 @@ sdhc_1: mmc@...4900 {
 				 <&gcc GCC_SDCC1_APPS_CLK>,
 				 <&xo>;
 			clock-names = "iface", "core", "xo";
+			resets = <&gcc GCC_SDCC1_BCR>;
 			max-frequency = <384000000>;
 			mmc-ddr-1_8v;
 			mmc-hs200-1_8v;
-- 
2.36.1