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Message-ID: <cc41d10e-8c3d-7911-560e-88158c91f4fe@linaro.org>
Date:   Tue, 5 Jul 2022 15:42:59 +0300
From:   Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
To:     Johan Hovold <johan+linaro@...nel.org>,
        Bjorn Andersson <bjorn.andersson@...aro.org>
Cc:     Andy Gross <agross@...nel.org>, Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH 02/14] arm64: dts: qcom: sm8250: add missing PCIe PHY
 clock-cells

On 05/07/2022 14:40, Johan Hovold wrote:
> Add the missing '#clock-cells' properties to the PCIe QMP PHY nodes.
> 
> Signed-off-by: Johan Hovold <johan+linaro@...nel.org>

Fixes: e53bdfc00977 ("arm64: dts: qcom: sm8250: Add PCIe support")


> ---
>   arch/arm64/boot/dts/qcom/sm8250.dtsi | 6 ++++++
>   1 file changed, 6 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
> index 53e0b57c13e4..f45a6cca397f 100644
> --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
> @@ -1892,6 +1892,8 @@ pcie0_lane: phy@...6200 {
>   				clock-names = "pipe0";
>   
>   				#phy-cells = <0>;
> +
> +				#clock-cells = <0>;
>   				clock-output-names = "pcie_0_pipe_clk";
>   			};
>   		};
> @@ -1998,6 +2000,8 @@ pcie1_lane: phy@...e200 {
>   				clock-names = "pipe0";
>   
>   				#phy-cells = <0>;
> +
> +				#clock-cells = <0>;
>   				clock-output-names = "pcie_1_pipe_clk";
>   			};
>   		};
> @@ -2104,6 +2108,8 @@ pcie2_lane: phy@...6200 {
>   				clock-names = "pipe0";
>   
>   				#phy-cells = <0>;
> +
> +				#clock-cells = <0>;
>   				clock-output-names = "pcie_2_pipe_clk";
>   			};
>   		};


-- 
With best wishes
Dmitry

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