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Message-Id: <20220705094239.17174-12-johan+linaro@kernel.org>
Date: Tue, 5 Jul 2022 11:42:07 +0200
From: Johan Hovold <johan+linaro@...nel.org>
To: Vinod Koul <vkoul@...nel.org>, Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>
Cc: Andy Gross <agross@...nel.org>,
Bjorn Andersson <bjorn.andersson@...aro.org>,
Kishon Vijay Abraham I <kishon@...com>,
linux-arm-msm@...r.kernel.org, linux-phy@...ts.infradead.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
Johan Hovold <johan+linaro@...nel.org>
Subject: [PATCH 11/43] dt-bindings: phy: qcom,msm8996-qmp-pcie: deprecate reset names
Drop the unnecessary "lane" suffix from the PHY reset names and mark the
old names as deprecated.
Signed-off-by: Johan Hovold <johan+linaro@...nel.org>
---
.../phy/qcom,msm8996-qmp-pcie-phy.yaml | 20 +++++++++++--------
1 file changed, 12 insertions(+), 8 deletions(-)
diff --git a/Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-pcie-phy.yaml
index 7931b1fd1476..0bea8270b37e 100644
--- a/Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-pcie-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-pcie-phy.yaml
@@ -94,11 +94,15 @@ patternProperties:
- description: PHY (lane) reset
reset-names:
- items:
- - enum:
- - lane0
- - lane1
- - lane2
+ oneOf:
+ - items:
+ - const: lane
+ - items:
+ - enum:
+ - lane0
+ - lane1
+ - lane2
+ deprecated: true
"#clock-cells":
const: 0
@@ -166,7 +170,7 @@ examples:
clocks = <&gcc GCC_PCIE_0_PIPE_CLK>;
clock-names = "pipe";
resets = <&gcc GCC_PCIE_0_PHY_BCR>;
- reset-names = "lane0";
+ reset-names = "lane";
#clock-cells = <0>;
clock-output-names = "pcie_0_pipe_clk_src";
@@ -182,7 +186,7 @@ examples:
clocks = <&gcc GCC_PCIE_1_PIPE_CLK>;
clock-names = "pipe";
resets = <&gcc GCC_PCIE_1_PHY_BCR>;
- reset-names = "lane1";
+ reset-names = "lane";
#clock-cells = <0>;
clock-output-names = "pcie_1_pipe_clk_src";
@@ -198,7 +202,7 @@ examples:
clocks = <&gcc GCC_PCIE_2_PIPE_CLK>;
clock-names = "pipe";
resets = <&gcc GCC_PCIE_2_PHY_BCR>;
- reset-names = "lane2";
+ reset-names = "lane";
#clock-cells = <0>;
clock-output-names = "pcie_2_pipe_clk_src";
--
2.35.1
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