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Message-Id: <20220705094239.17174-15-johan+linaro@kernel.org>
Date: Tue, 5 Jul 2022 11:42:10 +0200
From: Johan Hovold <johan+linaro@...nel.org>
To: Vinod Koul <vkoul@...nel.org>, Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>
Cc: Andy Gross <agross@...nel.org>,
Bjorn Andersson <bjorn.andersson@...aro.org>,
Kishon Vijay Abraham I <kishon@...com>,
linux-arm-msm@...r.kernel.org, linux-phy@...ts.infradead.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
Johan Hovold <johan+linaro@...nel.org>
Subject: [PATCH 14/43] dt-bindings: phy: qcom,qmp-pcie: clean up clock constraints
The PCIe PHY binding requires two, three or four clocks.
Signed-off-by: Johan Hovold <johan+linaro@...nel.org>
---
Documentation/devicetree/bindings/phy/qcom,qmp-pcie-phy.yaml | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/phy/qcom,qmp-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,qmp-pcie-phy.yaml
index 7cdc1cce06cf..0486b2b48d72 100644
--- a/Documentation/devicetree/bindings/phy/qcom,qmp-pcie-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/qcom,qmp-pcie-phy.yaml
@@ -43,11 +43,11 @@ properties:
ranges: true
clocks:
- minItems: 1
+ minItems: 2
maxItems: 4
clock-names:
- minItems: 1
+ minItems: 2
maxItems: 4
resets:
--
2.35.1
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