linux-kernel - Re: [PATCH v7 0/5] Renesas RZ/G2L IRQC support

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Message-ID: <87h73un2pv.wl-maz@kernel.org>
Date:   Wed, 06 Jul 2022 08:02:20 +0100
From:   Marc Zyngier <maz@...nel.org>
To:     Lad Prabhakar <prabhakar.csengg@...il.com>
Cc:     Thomas Gleixner <tglx@...utronix.de>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Geert Uytterhoeven <geert+renesas@...der.be>,
        Linus Walleij <linus.walleij@...aro.org>,
        Bartosz Golaszewski <brgl@...ev.pl>,
        Philipp Zabel <p.zabel@...gutronix.de>,
        devicetree@...r.kernel.org, linux-renesas-soc@...r.kernel.org,
        linux-gpio@...r.kernel.org, linux-kernel@...r.kernel.org,
        Biju Das <biju.das.jz@...renesas.com>,
        Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Subject: Re: [PATCH v7 0/5] Renesas RZ/G2L IRQC support

On Sun, 03 Jul 2022 20:40:15 +0100,
Lad Prabhakar <prabhakar.csengg@...il.com> wrote:
> 
> Hi All,
> 
> The RZ/G2L Interrupt Controller is a front-end for the GIC found on
> Renesas RZ/G2L SoC's with below pins:
> - IRQ sense select for 8 external interrupts, mapped to 8 GIC SPI
>   interrupts
> - GPIO pins used as external interrupt input pins out of GPIOINT0-122 a
>   maximum of only 32 can be mapped to 32 GIC SPI interrupts,
> - NMI edge select.
> 
>                                                              _____________
>                                                              |    GIC     |
>                                                              |  ________  |
>                                       ____________           | |        | |
> NMI --------------------------------->|          |  SPI0-479 | | GIC-600| |
>              _______                  |          |------------>|        | |
>              |      |                 |          |  PPI16-31 | |        | |
>              |      | IRQ0-IRQ7       |   IRQC   |------------>|        | |
> P0_P48_4 --->| GPIO |---------------->|          |           | |________| |
>              |      |GPIOINT0-122     |          |           |            |
>              |      |---------------->| TINT0-31 |           |            |
>              |______|                 |__________|           |____________|
> 
> The proposed patches add hierarchical IRQ domain, one in IRQC driver and
> another in pinctrl driver. Upon interrupt requests map the interrupt to
> GIC. Out of GPIOINT0-122 only 32 can be mapped to GIC SPI, this mapping is
> handled by the pinctrl and IRQC driver.
> 
> Cheers,
> Prabhakar
> 
> v6->v7:
> * Used devm_reset_control_get_exclusive() instead of
>   devm_reset_control_get_exclusive_by_index()
> * Included RB tag from Linus for patch 5/5
> * Switched to newer version of populate_parent_alloc_arg() (patch depends
>   on https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git/
>   patch/?id=178b7e21459e9a7e2a2c369711ef0cc9b1cfbcd7)

Please add this patch as part of the series.

	M.

-- 
Without deviation from the norm, progress is not possible.