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Date:   Thu, 7 Jul 2022 10:50:37 +0100
From:   Sudeep Holla <sudeep.holla@....com>
To:     Conor Dooley <mail@...chuod.ie>
Cc:     Paul Walmsley <paul.walmsley@...ive.com>,
        Palmer Dabbelt <palmer@...belt.com>,
        Palmer Dabbelt <palmer@...osinc.com>,
        Albert Ou <aou@...s.berkeley.edu>,
        Daire McNamara <daire.mcnamara@...rochip.com>,
        Sudeep Holla <sudeep.holla@....com>,
        Conor Dooley <conor.dooley@...rochip.com>,
        Niklas Cassel <niklas.cassel@....com>,
        Damien Le Moal <damien.lemoal@...nsource.wdc.com>,
        Geert Uytterhoeven <geert@...ux-m68k.org>,
        Zong Li <zong.li@...ive.com>,
        Emil Renner Berthing <kernel@...il.dk>,
        Jonas Hahnfeld <hahnjo@...njo.de>, Guo Ren <guoren@...nel.org>,
        Anup Patel <anup@...infault.org>,
        Atish Patra <atishp@...shpatra.org>,
        Changbin Du <changbin.du@...el.com>,
        Heiko Stuebner <heiko@...ech.de>,
        Philipp Tomsich <philipp.tomsich@...ll.eu>,
        linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org,
        Brice Goglin <Brice.Goglin@...ia.fr>
Subject: Re: [PATCH] riscv: arch-topology: fix default topology reporting

On Wed, Jul 06, 2022 at 07:45:59PM +0100, Conor Dooley wrote:
> From: Conor Dooley <conor.dooley@...rochip.com>
> 
> RISC-V has no sane defaults to fall back on where there is no cpu-map
> in the devicetree.
> Without sane defaults, the package, core and thread IDs are all set to
> -1. This causes user-visible inaccuracies for tools like hwloc/lstopo
> which rely on the sysfs cpu topology files to detect a system's
> topology.
> 
> Add sane defaults in ~the exact same way as ARM64.
> 
> CC: stable@...r.kernel.org
> Fixes: 03f11f03dbfe ("RISC-V: Parse cpu topology during boot.")
> Reported-by: Brice Goglin <Brice.Goglin@...ia.fr>
> Link: https://github.com/open-mpi/hwloc/issues/536
> Signed-off-by: Conor Dooley <conor.dooley@...rochip.com>
> ---
> 
> Sudeep suggested that this be backported rather than the changes to
> the devicetrees adding cpu-map since that property is optional.
> That patchset is still valid in it's own right.
> 
>  arch/riscv/include/asm/topology.h | 13 +++++++++++++
>  arch/riscv/kernel/Makefile        |  1 +
>  arch/riscv/kernel/smpboot.c       |  4 ++++
>  arch/riscv/kernel/topology.c      | 32 +++++++++++++++++++++++++++++++
>  4 files changed, 50 insertions(+)
>  create mode 100644 arch/riscv/include/asm/topology.h
>  create mode 100644 arch/riscv/kernel/topology.c
> 

[...]

> diff --git a/arch/riscv/kernel/smpboot.c b/arch/riscv/kernel/smpboot.c
> index f1e4948a4b52..d551c7f452d4 100644
> --- a/arch/riscv/kernel/smpboot.c
> +++ b/arch/riscv/kernel/smpboot.c
> @@ -32,6 +32,7 @@
>  #include <asm/sections.h>
>  #include <asm/sbi.h>
>  #include <asm/smp.h>
> +#include <asm/topology.h>
>  
>  #include "head.h"
>  

[...]

>  void __init smp_prepare_cpus(unsigned int max_cpus)
> @@ -161,6 +164,7 @@ asmlinkage __visible void smp_callin(void)
>  	mmgrab(mm);
>  	current->active_mm = mm;
>  
> +	store_cpu_topology(curr_cpuid);
>  	notify_cpu_starting(curr_cpuid);
>  	numa_add_cpu(curr_cpuid);
>  	update_siblings_masks(curr_cpuid);

If the above store_cpu_topology calls update_siblings_masks if required,
probably you can drop this explicit call here.

-- 
Regards,
Sudeep

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