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Message-ID: <CAHp75VdPi8rT_EJd8L8-waAkH_Lm947WVKMLHjjW5MpFW9A06Q@mail.gmail.com>
Date:   Fri, 8 Jul 2022 23:58:17 +0200
From:   Andy Shevchenko <andy.shevchenko@...il.com>
To:     Horatiu Vultur <horatiu.vultur@...rochip.com>
Cc:     "open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        Linus Walleij <linus.walleij@...aro.org>,
        kavyasree.kotagiri@...rochip.com,
        Alexandre Belloni <alexandre.belloni@...tlin.com>,
        Colin Foster <colin.foster@...advantage.com>,
        Microchip Linux Driver Support <UNGLinuxDriver@...rochip.com>,
        Maxime Chevallier <maxime.chevallier@...tlin.com>,
        Michael Walle <michael@...le.cc>
Subject: Re: [PATCH v2 1/2] pinctrl: ocelot: Fix pincfg for lan966x

On Fri, Jul 8, 2022 at 10:10 PM Horatiu Vultur
<horatiu.vultur@...rochip.com> wrote:
>
> The blamed commit introduce support for lan966x which use the same
> pinconf_ops as sparx5. The problem is that pinconf_ops is specific to
> sparx5. More precisely the offset of the bits in the pincfg register are
> different and also lan966x doesn't have support for
> PIN_CONFIG_INPUT_SCHMITT_ENABLE.
>
> Fix this by making pinconf_ops more generic such that it can be also
> used by lan966x. This is done by introducing 'ocelot_pincfg_data' which
> contains the offset and what is supported for each SOC.

...

> +struct ocelot_pincfg_data {
> +       bool has_schmitt;
> +       u8 schmitt_bit;
> +       u8 pd_bit;
> +       u8 pu_bit;
> +       u8 drive_bits;

I would go with mandatory fields first and leave optional (that is
with boolean flag) at last.

> +};

...

>  struct ocelot_pinctrl {
>         struct device *dev;
>         struct pinctrl_dev *pctl;
> @@ -330,6 +331,12 @@ struct ocelot_pinctrl {
>         struct pinctrl_desc *desc;
>         struct ocelot_pmx_func func[FUNC_MAX];
>         u8 stride;
> +       struct ocelot_pincfg_data *pincfg_data;

It might waste too many bytes in some cases. I would recommend moving
it somewhere above, definitely before the u8 member.

> +};

Yes, I understand that for a certain architecture it might be the same
result in sizeof(), the rationale is to make code better in case
somebody copies'n'pastes pieces or ideas from it.

...

>                 if (param == PIN_CONFIG_BIAS_DISABLE)>                         val = (val == 0);
>                 else if (param == PIN_CONFIG_BIAS_PULL_DOWN)
> -                       val = (val & BIAS_PD_BIT ? true : false);
> +                       val = (val & info->pincfg_data->pd_bit ? true : false);
>                 else    /* PIN_CONFIG_BIAS_PULL_UP */
> -                       val = (val & BIAS_PU_BIT ? true : false);
> +                       val = (val & info->pincfg_data->pu_bit ? true : false);
>                 break;

> +               val = (val & info->pincfg_data->schmitt_bit ? true : false);


!!(val & ...) will be a much shorter equivalent to ternary.

>                 break;

...

> +static struct ocelot_match_data ocelot_desc = {
> +       .desc = {
> +               .name = "ocelot-pinctrl",
> +               .pins = ocelot_pins,
> +               .npins = ARRAY_SIZE(ocelot_pins),
> +               .pctlops = &ocelot_pctl_ops,
> +               .pmxops = &ocelot_pmx_ops,
> +               .owner = THIS_MODULE,
> +       }

Please, keep a comma here. It's definitely not a terminating entry, so
it might help in the future.

Ditto for all cases like this.

>  };

...

> +       struct ocelot_match_data *data;

Any specific reason why this is not const?

...

> +       data = (struct ocelot_match_data *)device_get_match_data(dev);

And here you drop the qualifier...

I would recommend making it const and dropping the cast completely.

> +       if (!data)
> +               return -EINVAL;

-- 
With Best Regards,
Andy Shevchenko

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