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Message-ID: <CAHp75Vc0EasS2Z3x=cgTv==osXprPU3Zkc-Q9DMf4BMz2p6oLw@mail.gmail.com>
Date: Sat, 9 Jul 2022 00:02:14 +0200
From: Andy Shevchenko <andy.shevchenko@...il.com>
To: Colin Foster <colin.foster@...advantage.com>
Cc: Horatiu Vultur <horatiu.vultur@...rochip.com>,
"open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
Linus Walleij <linus.walleij@...aro.org>,
kavyasree.kotagiri@...rochip.com,
Alexandre Belloni <alexandre.belloni@...tlin.com>,
Microchip Linux Driver Support <UNGLinuxDriver@...rochip.com>,
Maxime Chevallier <maxime.chevallier@...tlin.com>,
Michael Walle <michael@...le.cc>
Subject: Re: [PATCH v2 2/2] pinctrl: ocelot: Fix pincfg
On Fri, Jul 8, 2022 at 10:17 PM Colin Foster
<colin.foster@...advantage.com> wrote:
> On Fri, Jul 08, 2022 at 09:55:10PM +0200, Horatiu Vultur wrote:
> > The blamed commit changed to use regmaps instead of __iomem. But it
> > didn't update the register offsets to be at word offset, so it uses byte
> > offset.
> > Another issue with the same commit is that it a limit of 32 registers
it has a limit
> > which is incorrect. The sparx5 has 64 while lan966x has 77.
...
> > - .max_register = 32,
>
> What happens in /sys/kernel/debug/regmap/*-pincfg/{range,registers} when
> there's no max register?
Good question!
> Should it be this?
>
> struct regmap_config regmap_config = {
> ...
> };
> regmap_config.max_register = info->desc->npins * regmap_config.reg_stride;
>
> > .name = "pincfg",
> > };
If regmap configuration may be const, I would prefer to have a
hardcoded value and different configuration based on the chip, but if
it's not feasible, then this could suffice.
--
With Best Regards,
Andy Shevchenko
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