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Message-ID: <Yse9RGTfRgqzzknt@gondor.apana.org.au>
Date: Fri, 8 Jul 2022 13:14:44 +0800
From: Herbert Xu <herbert@...dor.apana.org.au>
To: Conor.Dooley@...rochip.com
Cc: palmer@...osinc.com, palmer@...belt.com, arnd@...db.de,
Cyril.Jean@...rochip.com, Daire.McNamara@...rochip.com,
Lewis.Hanly@...rochip.com, aou@...s.berkeley.edu,
gregkh@...uxfoundation.org, kw@...ux.com,
linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-pci@...r.kernel.org, linux-riscv@...ts.infradead.org,
lorenzo.pieralisi@....com, mturquette@...libre.com,
paul.walmsley@...ive.com, robh@...nel.org, bhelgaas@...gle.com,
sboyd@...nel.org, wsa@...nel.org
Subject: Re: [RESEND PATCH v4] MAINTAINERS: add polarfire rng, pci and clock
drivers
On Thu, Jul 07, 2022 at 01:30:27PM +0000, Conor.Dooley@...rochip.com wrote:
> On 22/06/2022 23:58, Conor Dooley wrote:
> > From: Conor Dooley <conor.dooley@...rochip.com>
> >
> > Hardware random, PCI and clock drivers for the PolarFire SoC have been
> > upstreamed but are not covered by the MAINTAINERS entry, so add them.
> > Daire is the author of the clock & PCI drivers, so add him as a
> > maintainer in place of Lewis.
> >
> > Acked-by: Bjorn Helgaas <bhelgaas@...gle.com>
> > Acked-by: Stephen Boyd <sboyd@...nel.org>
> > Signed-off-by: Conor Dooley <conor.dooley@...rochip.com>
>
> Arnd, Palmer:
> Does the SoC tree make more sense for this patch?
> I am missing an ack from Herbert (but I don't think that's blocking
> for a MAINTAINERS update to my own entry?).
I'm not sure why an ack is needed from me since the entry doesn't
intersect with crypto at all. But FWIW
Acked-by: Herbert Xu <herbert@...dor.apana.org.au>
Cheers,
--
Email: Herbert Xu <herbert@...dor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
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