[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20220708082443.azoqvuj7afrg7ox7@bogus>
Date: Fri, 8 Jul 2022 09:24:43 +0100
From: Sudeep Holla <sudeep.holla@....com>
To: Conor Dooley <mail@...chuod.ie>
Cc: Paul Walmsley <paul.walmsley@...ive.com>,
Palmer Dabbelt <palmer@...belt.com>,
Palmer Dabbelt <palmer@...osinc.com>,
Albert Ou <aou@...s.berkeley.edu>,
Catalin Marinas <catalin.marinas@....com>,
Will Deacon <will@...nel.org>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
"Rafael J . Wysocki" <rafael@...nel.org>,
Daire McNamara <daire.mcnamara@...rochip.com>,
Conor Dooley <conor.dooley@...rochip.com>,
Niklas Cassel <niklas.cassel@....com>,
Damien Le Moal <damien.lemoal@...nsource.wdc.com>,
Geert Uytterhoeven <geert@...ux-m68k.org>,
Zong Li <zong.li@...ive.com>,
Emil Renner Berthing <kernel@...il.dk>,
Jonas Hahnfeld <hahnjo@...njo.de>, Guo Ren <guoren@...nel.org>,
Anup Patel <anup@...infault.org>,
Atish Patra <atishp@...shpatra.org>,
Changbin Du <changbin.du@...el.com>,
Heiko Stuebner <heiko@...ech.de>,
Philipp Tomsich <philipp.tomsich@...ll.eu>,
Rob Herring <robh@...nel.org>, Marc Zyngier <maz@...nel.org>,
Viresh Kumar <viresh.kumar@...aro.org>,
linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
Brice Goglin <Brice.Goglin@...ia.fr>
Subject: Re: [RFC 2/4] arch-topology: add a default implementation of
store_cpu_topology()
On Thu, Jul 07, 2022 at 11:04:35PM +0100, Conor Dooley wrote:
> From: Conor Dooley <conor.dooley@...rochip.com>
>
> RISC-V & arm64 both use an almost identical method of filling in
> default vales for arch topology. Create a weakly defined default
> implementation with the intent of migrating both archs to use it.
>
> Signed-off-by: Conor Dooley <conor.dooley@...rochip.com>
> ---
> drivers/base/arch_topology.c | 19 +++++++++++++++++++
> include/linux/arch_topology.h | 1 +
> 2 files changed, 20 insertions(+)
>
> diff --git a/drivers/base/arch_topology.c b/drivers/base/arch_topology.c
> index 441e14ac33a4..07e84c6ac5c2 100644
> --- a/drivers/base/arch_topology.c
> +++ b/drivers/base/arch_topology.c
> @@ -765,6 +765,25 @@ void update_siblings_masks(unsigned int cpuid)
> }
> }
>
> +void __weak store_cpu_topology(unsigned int cpuid)
I prefer to have this as default implementation. So just get the risc-v
one pushed to upstream first(for v5.20) and get all the backports if required.
Next cycle(i.e. v5.21), you can move both RISC-V and arm64.
--
Regards,
Sudeep
Powered by blists - more mailing lists