[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20220711202150.7yoxazefe3zzlzpw@soft-dev3-1.localhost>
Date: Mon, 11 Jul 2022 22:21:50 +0200
From: Horatiu Vultur <horatiu.vultur@...rochip.com>
To: Andy Shevchenko <andy.shevchenko@...il.com>
CC: "open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>,
"Linux Kernel Mailing List" <linux-kernel@...r.kernel.org>,
Linus Walleij <linus.walleij@...aro.org>,
<kavyasree.kotagiri@...rochip.com>,
"Alexandre Belloni" <alexandre.belloni@...tlin.com>,
Colin Foster <colin.foster@...advantage.com>,
Microchip Linux Driver Support <UNGLinuxDriver@...rochip.com>,
Maxime Chevallier <maxime.chevallier@...tlin.com>,
Michael Walle <michael@...le.cc>
Subject: Re: [PATCH v3 1/2] pinctrl: ocelot: Fix pincfg for lan966x
The 07/11/2022 21:47, Andy Shevchenko wrote:
>
> On Mon, Jul 11, 2022 at 9:17 PM Horatiu Vultur
> <horatiu.vultur@...rochip.com> wrote:
> >
> > The blamed commit introduce support for lan966x which use the same
> > pinconf_ops as sparx5. The problem is that pinconf_ops is specific to
> > sparx5. More precisely the offset of the bits in the pincfg register are
> > different and also lan966x doesn't have support for
> > PIN_CONFIG_INPUT_SCHMITT_ENABLE.
> >
> > Fix this by making pinconf_ops more generic such that it can be also
> > used by lan966x. This is done by introducing 'ocelot_pincfg_data' which
> > contains the offset and what is supported for each SOC.
>
>
> ...
>
> > + info->pincfg_data = devm_kmemdup(dev, &data->pincfg_data,
> > + sizeof(struct ocelot_match_data),
>
> sizeof(*info->pincfg_data)
> (isn't it a bug here?)
Yes it looks like it is. I think underneath it still allocates a page so
that could be the reason why I haven't see any crashes when I have tried
it.
I will fix this in the next version.
>
> > + GFP_KERNEL);
>
> and missed the NULL check.
>
> --
> With Best Regards,
> Andy Shevchenko
--
/Horatiu
Powered by blists - more mailing lists