linux-kernel - Re: [PATCH 1/2] dt-bindings: pinctrl: qcom: Add sm8450 lpass lpi pinctrl bindings

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Message-ID: <20220712145957.GB1823936-robh@kernel.org>
Date:   Tue, 12 Jul 2022 08:59:57 -0600
From:   Rob Herring <robh@...nel.org>
To:     Srinivas Kandagatla <srinivas.kandagatla@...aro.org>
Cc:     bjorn.andersson@...aro.org, linus.walleij@...aro.org,
        krzysztof.kozlowski+dt@...aro.org, linux-arm-msm@...r.kernel.org,
        linux-gpio@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH 1/2] dt-bindings: pinctrl: qcom: Add sm8450 lpass lpi
 pinctrl bindings

On Fri, Jul 01, 2022 at 11:06:18AM +0100, Srinivas Kandagatla wrote:
> thanks Rob,
> 
> On 30/06/2022 22:08, Rob Herring wrote:
> > On Wed, Jun 29, 2022 at 10:17:15AM +0100, Srinivas Kandagatla wrote:
> > > Add device tree binding Documentation details for Qualcomm SM8450
> > > LPASS(Low Power Audio Sub System) LPI(Low Power Island) pinctrl driver.
> > > 
> > > Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@...aro.org>
> > > ---
> > >   .../qcom,sm8450-lpass-lpi-pinctrl.yaml        | 138 ++++++++++++++++++
> > >   1 file changed, 138 insertions(+)
> > >   create mode 100644 Documentation/devicetree/bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml
> > > 
> > > diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml
> > > new file mode 100644
> > > index 000000000000..b49d70b9ba9a
> > > --- /dev/null
> > > +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml
> > > @@ -0,0 +1,138 @@
> > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > > +%YAML 1.2
> > > +---
> > > +$id: http://devicetree.org/schemas/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml#
> > > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > > +
> > > +title: Qualcomm Technologies, Inc. Low Power Audio SubSystem (LPASS)
> > > +  Low Power Island (LPI) TLMM block
> > > +
> > > +maintainers:
> > > +  - Srinivas Kandagatla <srinivas.kandagatla@...aro.org>
> > > +
> > > +description: |
> > > +  This binding describes the Top Level Mode Multiplexer block found in the
> > > +  LPASS LPI IP on most Qualcomm SoCs
> > > +
> > > +properties:
> > > +  compatible:
> > > +    const: qcom,sm8450-lpass-lpi-pinctrl
> > > +
> > > +  reg:
> > > +    minItems: 2
> > > +    maxItems: 2
> > 
> > What is each entry?
> 
> These are tlmm and slew register base address.
> 
> This has been like this in previous bindings for sm8250 and sc7280 lpi
> binding.

There's always bad examples to follow.
 
> Are you suggesting that we should add a description for reg for more
> clarity?

Well, 2 descriptions:

items:
  - description: ...
  - description: ...

Rob