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Message-ID: <20220712174551.GG1823936-robh@kernel.org>
Date: Tue, 12 Jul 2022 11:45:51 -0600
From: Rob Herring <robh@...nel.org>
To: Prashant Malani <pmalani@...omium.org>
Cc: Stephen Boyd <swboyd@...omium.org>,
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Subject: Re: [PATCH v5 1/9] dt-bindings: usb: Add Type-C switch binding
On Thu, Jun 30, 2022 at 10:10:32AM -0700, Prashant Malani wrote:
> (CC+ Bjorn)
>
> On Wed, Jun 29, 2022 at 4:55 PM Stephen Boyd <swboyd@...omium.org> wrote:
> >
> > Quoting Prashant Malani (2022-06-29 15:55:10)
> > > On Wed, Jun 29, 2022 at 2:58 PM Stephen Boyd <swboyd@...omium.org> wrote:
> > > >
> > > > My understanding is there are 4 DP lanes on it6505 and two lanes are
> > > > connected to one usb-c-connector and the other two lanes are connected
> > > > to a different usb-c-connector. The IT6505 driver will send DP out on
> > > > the associated two DP lanes depending on which usb-c-connector has DP
> > > > pins assigned by the typec manager.
> > [...]
> > >
> > > We can adopt this binding, but from what I gathered in this thread, that
> > > shouldn't be done, because IT6505 isn't meant to be aware of Type-C
> > > connections at all.
> >
> > How will the driver know which usb-c-connector to route DP to without
> > making the binding aware of typec connections?
>
> I agree with you; I'm saying my interpretation of the comments of this
> thread are that it's not the intended usage of the it6505 part, so the driver
> shouldn't be updated to support that.
That's not the right interpretation. There should not be some Type-C
specific child mux/switch node because the device has no such h/w within
it. Assuming all the possibilities Stephen outlined are valid, it's
clear this lane selection has nothing to do with Type-C. It does have an
output port for its DP output already and using that to describe the
connection to DP connector(s) and/or Type-C connector(s) should be
handled.
Whether the driver is type-C aware is a separate question from the
binding. I would think the driver just needs to be told (or it can ask)
which endpoint should be active and it just enables output on the
corresponding lanes for that endpoint. I'm not sure if all DP bridge
chips have the same flexibility on their output lanes, but I would
assume many do and we don't want to be duplicating the same code to
handle that in every bridge driver.
Rob
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