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Message-ID: <YtFQb+2tpYsg25w/@matsya>
Date:   Fri, 15 Jul 2022 17:03:03 +0530
From:   Vinod Koul <vkoul@...nel.org>
To:     Wangseok Lee <wangseok.lee@...sung.com>
Cc:     "robh+dt@...nel.org" <robh+dt@...nel.org>,
        "krzk+dt@...nel.org" <krzk+dt@...nel.org>,
        "kishon@...com" <kishon@...com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "jesper.nilsson@...s.com" <jesper.nilsson@...s.com>,
        "lars.persson@...s.com" <lars.persson@...s.com>,
        "bhelgaas@...gle.com" <bhelgaas@...gle.com>,
        "linux-phy@...ts.infradead.org" <linux-phy@...ts.infradead.org>,
        "linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "lorenzo.pieralisi@....com" <lorenzo.pieralisi@....com>,
        "kw@...ux.com" <kw@...ux.com>,
        "linux-arm-kernel@...s.com" <linux-arm-kernel@...s.com>,
        "kernel@...s.com" <kernel@...s.com>,
        Moon-Ki Jun <moonki.jun@...sung.com>,
        Sang Min Kim <hypmean.kim@...sung.com>,
        Dongjin Yang <dj76.yang@...sung.com>,
        Yeeun Kim <yeeun119.kim@...sung.com>
Subject: Re: [PATCH v3 4/5] phy: Add ARTPEC-8 PCIe PHY driver

On 14-07-22, 18:59, Wangseok Lee wrote:
> On 07-07-22, 01:52, Vinod Koul wrote:
> > On 06-07-22, 17:10, Wangseok Lee wrote:

> Sorry for late reply.
> 
> Above all, the IP blocks of phy-exynos-pcie.c and artpec8's pcie phy are
> different. As a result, the H/W architecture and operation sequence is
> very different. So it is very difficult to merge into a exynos pcie file.
> If possible, we would like to proceed with a new file. Is that possible?

Okay lets try that

-- 
~Vinod

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