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Message-ID: <YtFQb+2tpYsg25w/@matsya>
Date: Fri, 15 Jul 2022 17:03:03 +0530
From: Vinod Koul <vkoul@...nel.org>
To: Wangseok Lee <wangseok.lee@...sung.com>
Cc: "robh+dt@...nel.org" <robh+dt@...nel.org>,
"krzk+dt@...nel.org" <krzk+dt@...nel.org>,
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"linux-phy@...ts.infradead.org" <linux-phy@...ts.infradead.org>,
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Moon-Ki Jun <moonki.jun@...sung.com>,
Sang Min Kim <hypmean.kim@...sung.com>,
Dongjin Yang <dj76.yang@...sung.com>,
Yeeun Kim <yeeun119.kim@...sung.com>
Subject: Re: [PATCH v3 4/5] phy: Add ARTPEC-8 PCIe PHY driver
On 14-07-22, 18:59, Wangseok Lee wrote:
> On 07-07-22, 01:52, Vinod Koul wrote:
> > On 06-07-22, 17:10, Wangseok Lee wrote:
> Sorry for late reply.
>
> Above all, the IP blocks of phy-exynos-pcie.c and artpec8's pcie phy are
> different. As a result, the H/W architecture and operation sequence is
> very different. So it is very difficult to merge into a exynos pcie file.
> If possible, we would like to proceed with a new file. Is that possible?
Okay lets try that
--
~Vinod
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