linux-kernel - RE: [RFC PATCH 1/2] spi: Add multiple CS support for a single SPI device

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <DM6PR12MB2809BA6D4F94EA59E76E6576DC8B9@DM6PR12MB2809.namprd12.prod.outlook.com>
Date:   Fri, 15 Jul 2022 15:36:23 +0000
From:   "Mahapatra, Amit Kumar" <amit.kumar-mahapatra@....com>
To:     Mark Brown <broonie@...nel.org>,
        Michal Simek <michal.simek@...inx.com>
CC:     Amit Kumar Mahapatra <amit.kumar-mahapatra@...inx.com>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        "p.yadav@...com" <p.yadav@...com>,
        "miquel.raynal@...tlin.com" <miquel.raynal@...tlin.com>,
        "richard@....at" <richard@....at>,
        "vigneshr@...com" <vigneshr@...com>,
        "git@...inx.com" <git@...inx.com>,
        "linux-spi@...r.kernel.org" <linux-spi@...r.kernel.org>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "michael@...le.cc" <michael@...le.cc>,
        "linux-mtd@...ts.infradead.org" <linux-mtd@...ts.infradead.org>,
        "git (AMD-Xilinx)" <git@....com>,
        "Mahapatra, Amit Kumar" <amit.kumar-mahapatra@....com>
Subject: RE: [RFC PATCH 1/2] spi: Add multiple CS support for a single SPI
 device

Hello Mark,

> -----Original Message-----
> From: Mark Brown <broonie@...nel.org>
> Sent: Monday, July 11, 2022 8:23 PM
> To: Michal Simek <michal.simek@...inx.com>
> Cc: Amit Kumar Mahapatra <amit.kumar-mahapatra@...inx.com>; Krzysztof
> Kozlowski <krzysztof.kozlowski+dt@...aro.org>; p.yadav@...com;
> miquel.raynal@...tlin.com; richard@....at; vigneshr@...com;
> git@...inx.com; linux-spi@...r.kernel.org; linux-arm-
> kernel@...ts.infradead.org; linux-kernel@...r.kernel.org; michael@...le.cc;
> linux-mtd@...ts.infradead.org
> Subject: Re: [RFC PATCH 1/2] spi: Add multiple CS support for a single SPI
> device
> 
> On Mon, Jul 11, 2022 at 02:47:54PM +0200, Michal Simek wrote:
> > On 6/9/22 13:54, Mark Brown wrote:
> > > On Mon, Jun 06, 2022 at 04:56:06PM +0530, Amit Kumar Mahapatra
> wrote:
> 
> > > > +	u32 cs[SPI_CS_CNT_MAX];
> > > > +	u8 idx;
> > > >   	/* Mode (clock phase/polarity/etc.) */
> > > >   	if (of_property_read_bool(nc, "spi-cpha"))
> 
> > > This is changing the DT binding but doesn't have any updates to the
> > > binding document.  The binding code also doesn't validate that we
> > > don't have too many chip selects.
> 
> > I would like to better understand your request here in connection to
> > change in the binding code for validation.
> > What exactly do you want to validate?
> > That child reg property is not bigger than num-cs in controller node?
> 
> If you are adding support for multiple chip selects in the driver then there
> must be some mechanism for expressing that in the bindings which I would
> expect to see appear as a change to the binding document.

Thank you for the clarification.
As per my understanding we would not be needing a new DT 
property for expressing multi chip select support in the driver.
We can use "num-cs" property of the spi controller for 
broadcasting multi chip select support of the driver.
If "num-cs" value is greater than 1 then the driver can support 
multiple chip selects.

Please let us know if you have any other approach in mind.

Regards,
Amit