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Message-ID: <5875dacd-1431-210f-485d-0d47a3d3066f@arm.com>
Date: Tue, 19 Jul 2022 18:51:34 +0100
From: Suzuki K Poulose <suzuki.poulose@....com>
To: Mike Leach <mike.leach@...aro.org>, coresight@...ts.linaro.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Cc: mathieu.poirier@...aro.org, peterz@...radead.org, mingo@...hat.com,
acme@...nel.org, linux-perf-users@...r.kernel.org,
leo.yan@...aro.org, quic_jinlmao@...cinc.com
Subject: Re: [PATCH v2 03/13] coresight: stm: Update STM driver to use Trace
ID API
On 04/07/2022 09:11, Mike Leach wrote:
> Updates the STM driver to use the trace ID allocation API.
> This uses the _system_id calls to allocate an ID on device poll,
> and release on device remove.
>
> The sysfs access to the STMTRACEIDR register has been changed from RW
> to RO. Having this value as writable is not appropriate for the new
> Trace ID scheme - and had potential to cause errors in the previous
> scheme if values clashed with other sources.
>
> Signed-off-by: Mike Leach <mike.leach@...aro.org>
> ---
> drivers/hwtracing/coresight/coresight-stm.c | 41 +++++++--------------
> 1 file changed, 14 insertions(+), 27 deletions(-)
>
> diff --git a/drivers/hwtracing/coresight/coresight-stm.c b/drivers/hwtracing/coresight/coresight-stm.c
> index bb14a3a8a921..9ef3e923a930 100644
> --- a/drivers/hwtracing/coresight/coresight-stm.c
> +++ b/drivers/hwtracing/coresight/coresight-stm.c
> @@ -31,6 +31,7 @@
> #include <linux/stm.h>
>
> #include "coresight-priv.h"
> +#include "coresight-trace-id.h"
>
> #define STMDMASTARTR 0xc04
> #define STMDMASTOPR 0xc08
> @@ -615,24 +616,7 @@ static ssize_t traceid_show(struct device *dev,
> val = drvdata->traceid;
> return sprintf(buf, "%#lx\n", val);
> }
> -
> -static ssize_t traceid_store(struct device *dev,
> - struct device_attribute *attr,
> - const char *buf, size_t size)
> -{
> - int ret;
> - unsigned long val;
> - struct stm_drvdata *drvdata = dev_get_drvdata(dev->parent);
> -
> - ret = kstrtoul(buf, 16, &val);
> - if (ret)
> - return ret;
> -
> - /* traceid field is 7bit wide on STM32 */
> - drvdata->traceid = val & 0x7f;
> - return size;
> -}
> -static DEVICE_ATTR_RW(traceid);
> +static DEVICE_ATTR_RO(traceid);
>
> #define coresight_stm_reg(name, offset) \
> coresight_simple_reg32(struct stm_drvdata, name, offset)
> @@ -819,14 +803,6 @@ static void stm_init_default_data(struct stm_drvdata *drvdata)
> */
> drvdata->stmsper = ~0x0;
>
> - /*
> - * The trace ID value for *ETM* tracers start at CPU_ID * 2 + 0x10 and
> - * anything equal to or higher than 0x70 is reserved. Since 0x00 is
> - * also reserved the STM trace ID needs to be higher than 0x00 and
> - * lowner than 0x10.
> - */
> - drvdata->traceid = 0x1;
> -
> /* Set invariant transaction timing on all channels */
> bitmap_clear(drvdata->chs.guaranteed, 0, drvdata->numsp);
> }
> @@ -854,7 +830,7 @@ static void stm_init_generic_data(struct stm_drvdata *drvdata,
>
> static int stm_probe(struct amba_device *adev, const struct amba_id *id)
> {
> - int ret;
> + int ret, trace_id;
> void __iomem *base;
> struct device *dev = &adev->dev;
> struct coresight_platform_data *pdata = NULL;
> @@ -938,12 +914,22 @@ static int stm_probe(struct amba_device *adev, const struct amba_id *id)
> goto stm_unregister;
> }
>
> + trace_id = coresight_trace_id_get_system_id();
> + if (trace_id < 0) {
> + ret = trace_id;
> + goto cs_unregister;
> + }
> + drvdata->traceid = (u8)trace_id;
> +
> pm_runtime_put(&adev->dev);
>
> dev_info(&drvdata->csdev->dev, "%s initialized\n",
> (char *)coresight_get_uci_data(id));
> return 0;
>
> +cs_unregister:
> + coresight_unregister(drvdata->csdev);
> +
> stm_unregister:
> stm_unregister_device(&drvdata->stm);
> return ret;
> @@ -953,6 +939,7 @@ static void stm_remove(struct amba_device *adev)
> {
> struct stm_drvdata *drvdata = dev_get_drvdata(&adev->dev);
>
> + coresight_trace_id_put_system_id(drvdata->traceid);
This makes think that, we should add a WARN_ON() in
coresight_trace_id_put_system_id(id)
{
WARN_ON(!coresight_trace_id_is_used(id));
}
Anyways, for this patch:
Reviewed-by: Suzuki K Poulose <suzuki.poulose@....com>
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