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Message-Id: <20220719070451.8F5C6C341C6@smtp.kernel.org>
Date: Tue, 19 Jul 2022 00:04:49 -0700
From: Stephen Boyd <sboyd@...nel.org>
To: Alexandre Belloni <alexandre.belloni@...tlin.com>,
Claudiu Beznea <claudiu.beznea@...rochip.com>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Herve Codina <herve.codina@...tlin.com>,
Horatiu Vultur <horatiu.vultur@...rochip.com>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Michael Turquette <mturquette@...libre.com>,
Nicolas Ferre <nicolas.ferre@...rochip.com>,
Rob Herring <robh+dt@...nel.org>
Cc: linux-usb@...r.kernel.org, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
linux-clk@...r.kernel.org,
Thomas Petazzoni <thomas.petazzoni@...tlin.com>,
Herve Codina <herve.codina@...tlin.com>
Subject: Re: [PATCH v5 1/3] clk: lan966x: Fix the lan966x clock gate register address
Quoting Herve Codina (2022-07-04 03:28:43)
> The register address used for the clock gate register is the base
> register address coming from first reg map (ie. the generic
> clock registers) instead of the second reg map defining the clock
> gate register.
>
> Use the correct clock gate register address.
>
> Fixes: 5ad5915dea00 ("clk: lan966x: Extend lan966x clock driver for clock gating support")
> Signed-off-by: Herve Codina <herve.codina@...tlin.com>
> ---
Applied to clk-fixes
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