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Message-ID: <cfbe269b-998d-018a-2de9-824ef309301e@microchip.com>
Date:   Tue, 19 Jul 2022 07:58:43 +0000
From:   <Claudiu.Beznea@...rochip.com>
To:     <Horatiu.Vultur@...rochip.com>, <devicetree@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>
CC:     <robh+dt@...nel.org>, <krzysztof.kozlowski+dt@...aro.org>,
        <Nicolas.Ferre@...rochip.com>, <UNGLinuxDriver@...rochip.com>,
        <maxime.chevallier@...tlin.com>
Subject: Re: [PATCH 3/3] ARM: dts: lan966x: Enable network driver on pcb8291

On 19.07.2022 00:29, Horatiu Vultur wrote:
> The pcb8291 has 2 ports that are connected to the internal ports of the
> switch. Enable them in DT.
> 
> Signed-off-by: Horatiu Vultur <horatiu.vultur@...rochip.com>
> ---
>  arch/arm/boot/dts/lan966x-pcb8291.dts | 35 +++++++++++++++++++++++++++
>  1 file changed, 35 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/lan966x-pcb8291.dts b/arch/arm/boot/dts/lan966x-pcb8291.dts
> index 2cb532aa33f0..d890e6fcdbae 100644
> --- a/arch/arm/boot/dts/lan966x-pcb8291.dts
> +++ b/arch/arm/boot/dts/lan966x-pcb8291.dts
> @@ -4,6 +4,7 @@
>   */
>  /dts-v1/;
>  #include "lan966x.dtsi"
> +#include "dt-bindings/phy/phy-lan966x-serdes.h"
>  
>  / {
>  	model = "Microchip EVB - LAN9662";
> @@ -32,6 +33,40 @@ fc3_b_pins: fc3-b-pins {
>  	};
>  };
>  
> +&mdio1 {
> +	status = "okay";
> +};
> +
> +&phy0 {
> +	status = "okay";
> +};
> +
> +&phy1 {
> +	status = "okay";
> +};
> +
> +&switch {
> +	status = "okay";
> +};
> +
> +&serdes {
> +	status = "okay";
> +};
> +
> +&port0 {
> +	status = "okay";
> +	phy-handle = <&phy0>;
> +	phy-mode = "gmii";
> +	phys = <&serdes 0 CU(0)>;
> +};
> +
> +&port1 {
> +	status = "okay";
> +	phy-handle = <&phy1>;
> +	phy-mode = "gmii";
> +	phys = <&serdes 1 CU(1)>;
> +};
> +

Although gpio node is not places where it should be we tend to keep all the
nodes sorted alphabetically. Could you place follow this rule for these new
nodes?

Thank you,
Claudiu Beznea

>  &flx3 {
>  	atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>;
>  	status = "okay";

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