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Message-Id: <20220721172109.941900-2-mail@conchuod.ie>
Date: Thu, 21 Jul 2022 18:21:07 +0100
From: Conor Dooley <mail@...chuod.ie>
To: u.kleine-koenig@...gutronix.de
Cc: conor.dooley@...rochip.com, daire.mcnamara@...rochip.com,
devicetree@...r.kernel.org, krzysztof.kozlowski+dt@...aro.org,
lee.jones@...aro.org, linux-kernel@...r.kernel.org,
linux-pwm@...r.kernel.org, linux-riscv@...ts.infradead.org,
robh+dt@...nel.org, thierry.reding@...il.com,
Rob Herring <robh@...nel.org>
Subject: [PATCH v7 1/4] dt-bindings: pwm: fix microchip corePWM's pwm-cells
From: Conor Dooley <conor.dooley@...rochip.com>
corePWM is capable of inverted operation but the binding requires
\#pwm-cells of 2. Expand the binding to support setting the polarity.
Fixes: df77f7735786 ("dt-bindings: pwm: add microchip corepwm binding")
Acked-by: Rob Herring <robh@...nel.org>
Signed-off-by: Conor Dooley <conor.dooley@...rochip.com>
---
Documentation/devicetree/bindings/pwm/microchip,corepwm.yaml | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/pwm/microchip,corepwm.yaml b/Documentation/devicetree/bindings/pwm/microchip,corepwm.yaml
index a7fae1772a81..cd8e9a8907f8 100644
--- a/Documentation/devicetree/bindings/pwm/microchip,corepwm.yaml
+++ b/Documentation/devicetree/bindings/pwm/microchip,corepwm.yaml
@@ -30,7 +30,9 @@ properties:
maxItems: 1
"#pwm-cells":
- const: 2
+ enum: [2, 3]
+ description:
+ The only flag supported by the controller is PWM_POLARITY_INVERTED.
microchip,sync-update-mask:
description: |
--
2.37.1
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