[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <20220721172109.941900-3-mail@conchuod.ie>
Date: Thu, 21 Jul 2022 18:21:08 +0100
From: Conor Dooley <mail@...chuod.ie>
To: u.kleine-koenig@...gutronix.de
Cc: conor.dooley@...rochip.com, daire.mcnamara@...rochip.com,
devicetree@...r.kernel.org, krzysztof.kozlowski+dt@...aro.org,
lee.jones@...aro.org, linux-kernel@...r.kernel.org,
linux-pwm@...r.kernel.org, linux-riscv@...ts.infradead.org,
robh+dt@...nel.org, thierry.reding@...il.com
Subject: [PATCH v7 2/4] riscv: dts: fix the icicle's #pwm-cells
From: Conor Dooley <conor.dooley@...rochip.com>
\#pwm-cells for the Icicle kit's fabric PWM was incorrectly set to 2 &
blindly overridden by the (out of tree) driver anyway. The core can
support inverted operation, so update the entry to correctly report its
capabilities.
Fixes: 72560c6559b8 ("riscv: dts: microchip: add fpga fabric section to icicle kit")
Signed-off-by: Conor Dooley <conor.dooley@...rochip.com>
---
arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi b/arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi
index 0d28858b83f2..e09a13aef268 100644
--- a/arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi
+++ b/arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi
@@ -8,7 +8,7 @@ core_pwm0: pwm@...00000 {
compatible = "microchip,corepwm-rtl-v4";
reg = <0x0 0x41000000 0x0 0xF0>;
microchip,sync-update-mask = /bits/ 32 <0>;
- #pwm-cells = <2>;
+ #pwm-cells = <3>;
clocks = <&fabric_clk3>;
status = "disabled";
};
--
2.37.1
Powered by blists - more mailing lists