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Message-ID: <28e38506-8fce-9000-c211-199a7aa69910@microchip.com>
Date: Mon, 25 Jul 2022 09:20:05 +0000
From: <Conor.Dooley@...rochip.com>
To: <will@...nel.org>, <Conor.Dooley@...rochip.com>
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Subject: Re: [PATCH v4 0/2] Fix RISC-V's arch-topology reporting
On 25/07/2022 10:13, Will Deacon wrote:
> On Sat, Jul 23, 2022 at 11:22:01AM +0000, Conor.Dooley@...rochip.com wrote:
>> On 15/07/2022 18:51, Conor Dooley wrote:
>>
>> Hey,
>>
>> Not got any feedback on the smpboot changes from the RISC-V side.
>> I tested it on polarfire, the d1 (with both SMP & !SMP set iirc)
>> & on the u540. It all looked good to me.
>>
>> I'd like to have this fixed for v5.20, but there isn't too much
>> time left before the mw. Not too sure about the cross-tree changes,
>> does it need an immutable branch or could it go through driver-core?
>> Catalin suggested removing the CC stable from patch 1/2 & adding it
>> as a dependency for the 2/2 patch - but obviously that's up to the
>> committer to sort out.
>
> I'm finalising the arm64 queue today, so I don't really want to pull in
> additional changes beyond critical fixes at this point, I'm afraid. I was
> half-expecting a pull request from the riscv side last week but I didn't
> see anything.
Yeah, that's fair. It's late in the game for cross-tree messing.
I know Palmer has been p busy recently.
> FWIW, if there's still no movement by -rc1, then I'm happy to queue all
> of this on its own branch in the arm64 tree for 5.21.
Hopefully someone on the riscv side will have confirmed what I am doing
is sane by then.
>
> Let me know.
I will, thanks!
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