linux-kernel - Re: [PATCH 2/2] arm64: dts: microchip: sparx5: dont use PSCI for core bringup

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Message-ID: <CAK8P3a1mL7Pm5+0Ce89LTrup476WaxSQKpTgn=o98_uFuOdfyQ@mail.gmail.com>
Date:   Mon, 25 Jul 2022 15:32:51 +0200
From:   Arnd Bergmann <arnd@...db.de>
To:     Robert Marko <robert.marko@...tura.hr>
Cc:     Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Lars Povlsen <lars.povlsen@...rochip.com>,
        Steen Hegelund <Steen.Hegelund@...rochip.com>,
        Microchip Linux Driver Support <UNGLinuxDriver@...rochip.com>,
        Arnd Bergmann <arnd@...db.de>,
        Alexandre Belloni <alexandre.belloni@...tlin.com>,
        DTML <devicetree@...r.kernel.org>,
        Linux ARM <linux-arm-kernel@...ts.infradead.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 2/2] arm64: dts: microchip: sparx5: dont use PSCI for core bringup

On Mon, Jul 25, 2022 at 3:15 PM Robert Marko <robert.marko@...tura.hr> wrote:
>
> As described in previous commit, PSCI is not implemented on this SoC at
> all, so use spin-tables to bringup the cores.
>
> Tested on PCB134 with eMMC (VSC5640EV).
>
> Fixes: 6694aee00a4b ("arm64: dts: sparx5: Add basic cpu support")
> Signed-off-by: Robert Marko <robert.marko@...tura.hr>
> ---

Surely this is only a machine specific bug in the boot loader, not something
the SoC is incapable of supporting, right?

>  arch/arm64/boot/dts/microchip/sparx5.dtsi | 6 ++++--
>  1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/microchip/sparx5.dtsi b/arch/arm64/boot/dts/microchip/sparx5.dtsi
> index 38da24c1796c..ea2b07ca2887 100644
> --- a/arch/arm64/boot/dts/microchip/sparx5.dtsi
> +++ b/arch/arm64/boot/dts/microchip/sparx5.dtsi
> @@ -40,14 +40,16 @@ cpu0: cpu@0 {
>                         compatible = "arm,cortex-a53";
>                         device_type = "cpu";
>                         reg = <0x0 0x0>;
> -                       enable-method = "psci";
> +                       enable-method = "spin-table";
> +                       cpu-release-addr = <0x0 0x0000fff8>;
>                         next-level-cache = <&L2_0>;
>                 };

I think the psci method should be kept in the dtsi file here, since actual
product boards would have to support it to be useful, you can just add
the spin-table as an override in the broken reference boards, with a
comment about which u-boot version is broken, in case this gets fixed
in the future.

       Arnd