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Message-ID: <659c6aa4-1100-0945-4965-3e106dfd490f@microchip.com>
Date: Tue, 26 Jul 2022 13:40:18 +0000
From: <Conor.Dooley@...rochip.com>
To: <anup@...infault.org>, <palmer@...belt.com>
CC: <apatel@...tanamicro.com>, <arnd@...db.de>,
<paul.walmsley@...ive.com>, <linux-kernel@...r.kernel.org>,
<heinrich.schuchardt@...onical.com>, <atishp@...shpatra.org>,
<linux-riscv@...ts.infradead.org>
Subject: Re: [PATCH] RISC-V: Add mvendorid, marchid, and mimpid to
/proc/cpuinfo output
Hey Anup,
On 26/07/2022 12:57, Anup Patel wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> Hi Palmer,
>
> On Mon, Jun 20, 2022 at 5:26 PM Anup Patel <apatel@...tanamicro.com> wrote:
>>
>> Identifying the underlying RISC-V implementation can be important
>> for some of the user space applications. For example, the perf tool
>> uses arch specific CPU implementation id (i.e. CPUID) to select a
>> JSON file describing custom perf events on a CPU.
>>
>> Currently, there is no way to identify RISC-V implementation so we
>> add mvendorid, marchid, and mimpid to /proc/cpuinfo output.
>>
>> Signed-off-by: Anup Patel <apatel@...tanamicro.com>
>
> Can this patch be considered for 5.20 ?
iirc I mentioned the consistency of using defined() for
CONFIG_RISCV_SBI versus IS_ENABLED() elsewhere in arch/riscv/
but I don't recall a response.
Thanks,
Conor.
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