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Date:   Thu, 28 Jul 2022 15:50:27 -0600
From:   Rob Herring <robh@...nel.org>
To:     Vinod Koul <vkoul@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>
Cc:     "open list:DMA GENERIC OFFLOAD ENGINE SUBSYSTEM" 
        <dmaengine@...r.kernel.org>, devicetree@...r.kernel.org,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] dt-bindings: dma: arm,pl330: Add missing 'iommus' property

On Thu, Jul 28, 2022 at 12:55 PM Rob Herring <robh@...nel.org> wrote:
>
> The pl330 can be behind an IOMMU which is the case for Arm Juno board.
> Add the 'iommus' property allowing for 1 IOMMU per channel.
>
> Signed-off-by: Rob Herring <robh@...nel.org>
> ---
>  Documentation/devicetree/bindings/dma/arm,pl330.yaml | 5 +++++
>  1 file changed, 5 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/dma/arm,pl330.yaml b/Documentation/devicetree/bindings/dma/arm,pl330.yaml
> index 2bec69b308f8..b9c4bee178ae 100644
> --- a/Documentation/devicetree/bindings/dma/arm,pl330.yaml
> +++ b/Documentation/devicetree/bindings/dma/arm,pl330.yaml
> @@ -55,6 +55,11 @@ properties:
>
>    dma-coherent: true
>
> +  iommus:
> +    minItems: 1
> +    maxItems: 8

Off by 1. Juno has 9 entries. I think it's 8 entries for write the
read side has 1 entry. The TRM isn't too clear.

Rob

> +    description: Up to 1 IOMMU per DMA channel
> +
>    power-domains:
>      maxItems: 1
>
> --
> 2.34.1
>

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