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Message-ID: <20220802070518.855951-1-nagasuresh.relli@microchip.com>
Date: Tue, 2 Aug 2022 12:35:15 +0530
From: Naga Sureshkumar Relli <nagasuresh.relli@...rochip.com>
To: <broonie@...nel.org>, <robh+dt@...nel.org>,
<krzysztof.kozlowski+dt@...aro.org>, <conor.dooley@...rochip.com>
CC: <linux-spi@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>,
Naga Sureshkumar Relli <nagasuresh.relli@...rochip.com>
Subject: [PATCH v2 0/3] Add support for Microchip QSPI controller
This patch enables the Microchip's FPGA QSPI and Polarfire SoC QSPI
controller support.
Tested spi-nand (W25N01GV) and spi-nor (MT25QL256A) on Microchip's
ICICLE kit. tested using both FPGA QSPI and Polarfie SoC QSPI.
changes in v2
------------
1. Replaced spi_alloc_master() with devm_spi_alloc_master()
2. Used dev_err_probe() when devm_spi_alloc_master() fails.
3. Added shared IRQ flag in the interrupt registration.
4. Updated the dt_bindings so that there is a differentiation
between FPGA QSPI IP core and hard QSPI IP core.
5. Updated the MAINTAINERS file.
Naga Sureshkumar Relli (3):
spi: dt-binding: add Microchip CoreQSPI compatible
spi: microchip-core-qspi: Add support for microchip fpga qspi
controllers
MAINTAINERS: add qspi to Polarfire SoC entry
.../bindings/spi/microchip,mpfs-spi.yaml | 12 +-
MAINTAINERS | 1 +
drivers/spi/Kconfig | 9 +
drivers/spi/Makefile | 1 +
drivers/spi/spi-microchip-core-qspi.c | 609 ++++++++++++++++++
5 files changed, 629 insertions(+), 3 deletions(-)
create mode 100644 drivers/spi/spi-microchip-core-qspi.c
--
2.25.1
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