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Date:   Tue, 2 Aug 2022 09:12:41 +0000
From:   <Conor.Dooley@...rochip.com>
To:     <Nagasuresh.Relli@...rochip.com>, <broonie@...nel.org>,
        <robh+dt@...nel.org>, <krzysztof.kozlowski+dt@...aro.org>,
        <Conor.Dooley@...rochip.com>
CC:     <linux-spi@...r.kernel.org>, <devicetree@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2 1/3] spi: dt-binding: add Microchip CoreQSPI compatible

On 02/08/2022 08:05, Naga Sureshkumar Relli wrote:
> Add compatible string for Microchip CoreQSPI controller.
> 
> Signed-off-by: Naga Sureshkumar Relli <nagasuresh.relli@...rochip.com>
> ---
>   .../devicetree/bindings/spi/microchip,mpfs-spi.yaml  | 12 +++++++++---
>   1 file changed, 9 insertions(+), 3 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/spi/microchip,mpfs-spi.yaml b/Documentation/devicetree/bindings/spi/microchip,mpfs-spi.yaml
> index 7326c0a28d16..8d252eb8c460 100644
> --- a/Documentation/devicetree/bindings/spi/microchip,mpfs-spi.yaml
> +++ b/Documentation/devicetree/bindings/spi/microchip,mpfs-spi.yaml
> @@ -14,9 +14,15 @@ allOf:
>   
>   properties:
>     compatible:
> -    enum:
> -      - microchip,mpfs-spi
> -      - microchip,mpfs-qspi
> +    oneOf:
> +      - description: Microchip's Polarfire SoC QSPI controller.

As per Krzk on v1, the descriptions should be dropped.
https://lore.kernel.org/linux-spi/6d36b192-9e63-ec13-5583-22b81c99c18b@linaro.org/

> +        items:
> +          - const: microchip,mpfs-qspi
> +          - const: microchip,coreqspi-rtl-v2
> +      - description: Microchip's fabric based QSPI IP core
> +        const: microchip,coreqspi-rtl-v2
> +      - description: Microchip's Polarfire SoC SPI controller.
> +        const: microchip,mpfs-spi
>   
>     reg:
>       maxItems: 1

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