[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <f1d723cb-5e7f-e698-cdcd-d84e3dc9dcdf@microchip.com>
Date: Tue, 2 Aug 2022 09:13:46 +0000
From: <Conor.Dooley@...rochip.com>
To: <Nagasuresh.Relli@...rochip.com>, <broonie@...nel.org>,
<robh+dt@...nel.org>, <krzysztof.kozlowski+dt@...aro.org>,
<Conor.Dooley@...rochip.com>
CC: <linux-spi@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2 3/3] MAINTAINERS: add qspi to Polarfire SoC entry
On 02/08/2022 08:05, Naga Sureshkumar Relli wrote:
> Add the qspi driver to the existing Polarfire SoC entry.
>
> Signed-off-by: Naga Sureshkumar Relli <nagasuresh.relli@...rochip.com>
Thanks Suresh.
Acked-by: Conor Dooley <conor.dooley@...rochip.com>
> ---
> MAINTAINERS | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 295ca16a415b..0329dca23fe2 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -17146,6 +17146,7 @@ S: Supported
> F: arch/riscv/boot/dts/microchip/
> F: drivers/mailbox/mailbox-mpfs.c
> F: drivers/soc/microchip/
> +F: drivers/spi/spi-microchip-core-qspi.c
> F: drivers/spi/spi-microchip-core.c
> F: include/soc/microchip/mpfs.h
>
Powered by blists - more mailing lists