linux-kernel - Re: [PATCH v2 1/3] spi: dt-binding: add Microchip CoreQSPI compatible

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Message-ID: <3406e537-cc97-42c5-2342-cee18e8054fc@linaro.org>
Date:   Tue, 2 Aug 2022 12:25:05 +0200
From:   Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To:     Naga Sureshkumar Relli <nagasuresh.relli@...rochip.com>,
        broonie@...nel.org, robh+dt@...nel.org,
        krzysztof.kozlowski+dt@...aro.org, conor.dooley@...rochip.com
Cc:     linux-spi@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 1/3] spi: dt-binding: add Microchip CoreQSPI compatible

On 02/08/2022 09:05, Naga Sureshkumar Relli wrote:
> Add compatible string for Microchip CoreQSPI controller.
> 
> Signed-off-by: Naga Sureshkumar Relli <nagasuresh.relli@...rochip.com>
> ---
>  .../devicetree/bindings/spi/microchip,mpfs-spi.yaml  | 12 +++++++++---
>  1 file changed, 9 insertions(+), 3 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/spi/microchip,mpfs-spi.yaml b/Documentation/devicetree/bindings/spi/microchip,mpfs-spi.yaml
> index 7326c0a28d16..8d252eb8c460 100644
> --- a/Documentation/devicetree/bindings/spi/microchip,mpfs-spi.yaml
> +++ b/Documentation/devicetree/bindings/spi/microchip,mpfs-spi.yaml
> @@ -14,9 +14,15 @@ allOf:
>  
>  properties:
>    compatible:
> -    enum:
> -      - microchip,mpfs-spi
> -      - microchip,mpfs-qspi
> +    oneOf:
> +      - description: Microchip's Polarfire SoC QSPI controller.
> +        items:
> +          - const: microchip,mpfs-qspi
> +          - const: microchip,coreqspi-rtl-v2

This is a bit confusing and it is no described in commit msg. You change
 compatibles for existing binding. This must be a separate commit with
its own explanation/reasoning.


Best regards,
Krzysztof