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Message-ID: <20220804070603.s3llvccpldtkejln@pengutronix.de>
Date: Thu, 4 Aug 2022 09:06:03 +0200
From: Marc Kleine-Budde <mkl@...gutronix.de>
To: Sebastian Würl <sebastian.wuerl@...ratech.com>
Cc: Wolfgang Grandegger <wg@...ndegger.com>,
"David S. Miller" <davem@...emloft.net>,
Eric Dumazet <edumazet@...gle.com>,
Jakub Kicinski <kuba@...nel.org>,
Paolo Abeni <pabeni@...hat.com>,
Vincent Mailhol <mailhol.vincent@...adoo.fr>,
Stefan Mätje <stefan.maetje@....eu>,
Andy Shevchenko <andriy.shevchenko@...ux.intel.com>,
Oliver Hartkopp <socketcan@...tkopp.net>,
Sebastian Andrzej Siewior <bigeasy@...utronix.de>,
Uwe Kleine-König
<u.kleine-koenig@...gutronix.de>,
Christian Pellegrin <chripell@...e.org>,
linux-can@...r.kernel.org, netdev@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH] can: mcp251x: Fix race condition on receive interrupt
On 04.08.2022 08:48:03, Sebastian Würl wrote:
> The mcp251x driver uses both receiving mailboxes of the CAN controller
> chips. For retrieving the CAN frames from the controller via SPI, it checks
> once per interrupt which mailboxes have been filled and will retrieve the
> messages accordingly.
>
> This introduces a race condition, as another CAN frame can enter mailbox 1
> while mailbox 0 is emptied. If now another CAN frame enters mailbox 0 until
> the interrupt handler is called next, mailbox 0 is emptied before
> mailbox 1, leading to out-of-order CAN frames in the network device.
>
> This is fixed by checking the interrupt flags once again after freeing
> mailbox 0, to correctly also empty mailbox 1 before leaving the handler.
>
> For reproducing the bug I created the following setup:
> - Two CAN devices, one Raspberry Pi with MCP2515, the other can be any.
> - Setup CAN to 1 MHz
> - Spam bursts of 5 CAN-messages with increasing CAN-ids
> - Continue sending the bursts while sleeping a second between the bursts
> - Check on the RPi whether the received messages have increasing CAN-ids
> - Without this patch, every burst of messages will contain a flipped pair
>
> Fixes: bf66f3736a94 ("can: mcp251x: Move to threaded interrupts instead of workqueues.")
> Signed-off-by: Sebastian Würl <sebastian.wuerl@...ratech.com>
Thanks for your patch! I think we're almost there. If you send a new
version of the patch, please increase the reroll count, i.e. add a -v3
to the patch subject, this can be done with the parameter "-v3" to git
send-email or git format-patch.
> ---
> drivers/net/can/spi/mcp251x.c | 26 +++++++++++++++++++-------
> 1 file changed, 19 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/net/can/spi/mcp251x.c b/drivers/net/can/spi/mcp251x.c
> index 89897a2d41fa..ca462868141c 100644
> --- a/drivers/net/can/spi/mcp251x.c
> +++ b/drivers/net/can/spi/mcp251x.c
> @@ -1068,17 +1068,14 @@ static irqreturn_t mcp251x_can_ist(int irq, void *dev_id)
> mutex_lock(&priv->mcp_lock);
> while (!priv->force_quit) {
> enum can_state new_state;
> - u8 intf, eflag;
> + u8 intf, intf0, intf1, eflag, eflag0, eflag1;
> u8 clear_intf = 0;
> int can_id = 0, data1 = 0;
>
> - mcp251x_read_2regs(spi, CANINTF, &intf, &eflag);
Keep the read into "&intf, &eflag" here....
> -
> - /* mask out flags we don't care about */
> - intf &= CANINTF_RX | CANINTF_TX | CANINTF_ERR;
> + mcp251x_read_2regs(spi, CANINTF, &intf0, &eflag0);
>
> /* receive buffer 0 */
> - if (intf & CANINTF_RX0IF) {
> + if (intf0 & CANINTF_RX0IF) {
> mcp251x_hw_rx(spi, 0);
> /* Free one buffer ASAP
> * (The MCP2515/25625 does this automatically.)
> @@ -1086,16 +1083,31 @@ static irqreturn_t mcp251x_can_ist(int irq, void *dev_id)
> if (mcp251x_is_2510(spi))
> mcp251x_write_bits(spi, CANINTF,
> CANINTF_RX0IF, 0x00);
> +
> + if (intf0 & CANINTF_RX1IF) {
> + /* buffer 1 is already known to be full, no need to re-read */
Nice! I haven't thought about this optimization.
> + intf1 = intf0;
...no need to assign intf1.
> + } else {
Move intf1 into this scope...
> + /* intf needs to be read again to avoid a race condition */
> + mcp251x_read_2regs(spi, CANINTF, &intf1, &eflag1);
...and "or" it to intf here:
intf |= intf1;
Another optimization idea: Do we need to re-read the eflag1? "eflag" is
for error handling only and you're optimizing the good path.
> + }
> }
>
> /* receive buffer 1 */
> - if (intf & CANINTF_RX1IF) {
> + if (intf1 & CANINTF_RX1IF) {
> mcp251x_hw_rx(spi, 1);
> /* The MCP2515/25625 does this automatically. */
> if (mcp251x_is_2510(spi))
> clear_intf |= CANINTF_RX1IF;
> }
>
> + /* combine flags from both operations for error handling */
> + intf = intf0 | intf1;
> + eflag = eflag0 | eflag1;
> +
> + /* mask out flags we don't care about */
> + intf &= CANINTF_RX | CANINTF_TX | CANINTF_ERR;
> +
> /* any error or tx interrupt we need to clear? */
> if (intf & (CANINTF_ERR | CANINTF_TX))
> clear_intf |= intf & (CANINTF_ERR | CANINTF_TX);
> --
> 2.30.2
>
>
regards,
Marc
--
Pengutronix e.K. | Marc Kleine-Budde |
Embedded Linux | https://www.pengutronix.de |
Vertretung West/Dortmund | Phone: +49-231-2826-924 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
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