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Message-ID: <bd0fb511-043f-55fc-5f9d-1cbeeca066e6@linaro.org>
Date: Wed, 10 Aug 2022 17:51:14 +0300
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Bjorn Andersson <bjorn.andersson@...aro.org>,
Andy Gross <agross@...nel.org>,
Konrad Dybcio <konrad.dybcio@...ainline.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>
Cc: linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH 2/4] arm64: dts: qcom: sdm845: add displayport node
On 10/08/2022 06:54, Bjorn Andersson wrote:
> From: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
>
> Add displayport controller device node, describing DisplayPort hardware
> block on SDM845.
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
> Signed-off-by: Bjorn Andersson <bjorn.andersson@...aro.org>
> ---
If the patchset does not go with your dt-bindings change, it won't be
tested by Rob's bot for that binding. Responsibility to run dtbs_check
is then on you. :)
> arch/arm64/boot/dts/qcom/sdm845.dtsi | 82 +++++++++++++++++++++++++++-
> 1 file changed, 80 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> index eae307a4babf..a8ba6ebc714f 100644
> --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> @@ -4457,13 +4457,20 @@ ports {
>
> port@0 {
> reg = <0>;
> - dpu_intf1_out: endpoint {
> - remote-endpoint = <&dsi0_in>;
> + dpu_intf0_out: endpoint {
> + remote-endpoint = <&dp_in>;
> };
> };
>
> port@1 {
> reg = <1>;
> + dpu_intf1_out: endpoint {
> + remote-endpoint = <&dsi0_in>;
> + };
> + };
> +
> + port@2 {
> + reg = <2>;
> dpu_intf2_out: endpoint {
> remote-endpoint = <&dsi1_in>;
> };
> @@ -4495,6 +4502,77 @@ opp-430000000 {
> };
> };
>
> + mdss_dp: displayport-controller@...0000 {
> + status = "disabled";
status at the end.
> + compatible = "qcom,sdm845-dp";
> +
> + reg = <0 0xae90000 0 0x200>,
> + <0 0xae90200 0 0x200>,
> + <0 0xae90400 0 0x600>,
> + <0 0xae90a00 0 0x600>,
> + <0 0xae91000 0 0x600>;
> +
> + interrupt-parent = <&mdss>;
> + interrupts = <12>;
> +
> + clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
> + <&dispcc DISP_CC_MDSS_DP_AUX_CLK>,
> + <&dispcc DISP_CC_MDSS_DP_LINK_CLK>,
> + <&dispcc DISP_CC_MDSS_DP_LINK_INTF_CLK>,
> + <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK>;
> + clock-names = "core_iface", "core_aux", "ctrl_link",
> + "ctrl_link_iface", "stream_pixel";
> + #clock-cells = <1>;
> + assigned-clocks = <&dispcc DISP_CC_MDSS_DP_LINK_CLK_SRC>,
> + <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>;
> + assigned-clock-parents = <&dp_phy 0>, <&dp_phy 1>;
> + phys = <&dp_phy>;
> + phy-names = "dp";
> +
> + operating-points-v2 = <&dp_opp_table>;
> + power-domains = <&rpmhpd SDM845_CX>;
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + port@0 {
> + reg = <0>;
> + dp_in: endpoint {
> + remote-endpoint = <&dpu_intf0_out>;
> + };
> + };
> +
> + port@1 {
> + reg = <1>;
> + dp_out: endpoint { };
> + };
> + };
> +
> + dp_opp_table: dp-opp-table {
Node name just "opp-table"
> + compatible = "operating-points-v2";
> +
Best regards,
Krzysztof
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