lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
Open Source and information security mailing list archives
| ||
|
Date: Thu, 11 Aug 2022 11:55:24 -0400 From: Sasha Levin <sashal@...nel.org> To: linux-kernel@...r.kernel.org, stable@...r.kernel.org Cc: Duncan Ma <duncan.ma@....com>, Dmytro Laktyushkin <Dmytro.Laktyushkin@....com>, Nicholas Kazlauskas <Nicholas.Kazlauskas@....com>, Hansen Dsouza <Hansen.Dsouza@....com>, Hamza Mahfooz <hamza.mahfooz@....com>, Daniel Wheeler <daniel.wheeler@....com>, Alex Deucher <alexander.deucher@....com>, Sasha Levin <sashal@...nel.org>, harry.wentland@....com, sunpeng.li@....com, Rodrigo.Siqueira@....com, christian.koenig@....com, Xinhui.Pan@....com, airlied@...ux.ie, daniel@...ll.ch, Aric.Cyr@....com, Jun.Lei@....com, Anthony.Koo@....com, wenjing.liu@....com, Yi-Ling.Chen2@....com, mwen@...lia.com, Jimmy.Kizito@....com, Jerry.Zuo@....com, gabe.teeger@....com, Sungjoon.Kim@....com, isabbasso@...eup.net, amd-gfx@...ts.freedesktop.org, dri-devel@...ts.freedesktop.org Subject: [PATCH AUTOSEL 5.15 15/69] drm/amd/display: Fix dpp dto for disabled pipes From: Duncan Ma <duncan.ma@....com> [ Upstream commit d4965c53b95d7533dfc2309d2fc25838bd33220e ] [Why] When switching from 1 pipe to 4to1 mpc combine, DppDtoClk aren't enabled for the disabled pipes pior to programming the pipes. Upon optimizing bandwidth, DppDto are enabled causing intermittent underflow. [How] Update dppclk dto whenever pipe are flagged to enable. Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@....com> Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@....com> Reviewed-by: Hansen Dsouza <Hansen.Dsouza@....com> Acked-by: Hamza Mahfooz <hamza.mahfooz@....com> Signed-off-by: Duncan Ma <duncan.ma@....com> Tested-by: Daniel Wheeler <daniel.wheeler@....com> Signed-off-by: Alex Deucher <alexander.deucher@....com> Signed-off-by: Sasha Levin <sashal@...nel.org> --- drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c index 9f8d7f92300b..3c7229befaaa 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c @@ -1405,11 +1405,15 @@ static void dcn20_update_dchubp_dpp( struct hubp *hubp = pipe_ctx->plane_res.hubp; struct dpp *dpp = pipe_ctx->plane_res.dpp; struct dc_plane_state *plane_state = pipe_ctx->plane_state; + struct dccg *dccg = dc->res_pool->dccg; bool viewport_changed = false; if (pipe_ctx->update_flags.bits.dppclk) dpp->funcs->dpp_dppclk_control(dpp, false, true); + if (pipe_ctx->update_flags.bits.enable) + dccg->funcs->update_dpp_dto(dccg, dpp->inst, pipe_ctx->plane_res.bw.dppclk_khz); + /* TODO: Need input parameter to tell current DCHUB pipe tie to which OTG * VTG is within DCHUBBUB which is commond block share by each pipe HUBP. * VTG is 1:1 mapping with OTG. Each pipe HUBP will select which VTG -- 2.35.1
Powered by blists - more mailing lists