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Message-ID: <132858ae66f1cffeb32cc39b788647f52957fd5e.camel@intel.com>
Date:   Sun, 14 Aug 2022 01:29:31 +0800
From:   Zhang Rui <rui.zhang@...el.com>
To:     Ingo Molnar <mingo@...nel.org>
Cc:     linux-kernel@...r.kernel.org, x86@...nel.org,
        linux-hwmon@...r.kernel.org, tglx@...utronix.de, mingo@...hat.com,
        bp@...en8.de, dave.hansen@...ux.intel.com, hpa@...or.com,
        corbet@....net, fenghua.yu@...el.com, jdelvare@...e.com,
        linux@...ck-us.net, len.brown@...el.com
Subject: Re: [PATCH 7/7] perf/x86/intel/P4: Fix smp_num_siblings usage

Hi, Ingo,

On Sat, 2022-08-13 at 12:50 +0200, Ingo Molnar wrote:
> 
> * Zhang Rui <rui.zhang@...el.com> wrote:
> 
> > smp_num_siblings can be larger than 2.
> > 
> > Any value larger than 1 suggests HT is supported.
> > 
> > Reviewed-by: Len Brown <len.brown@...el.com>
> > Signed-off-by: Zhang Rui <rui.zhang@...el.com>
> > ---
> >  arch/x86/include/asm/perf_event_p4.h | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> > 
> > diff --git a/arch/x86/include/asm/perf_event_p4.h
> > b/arch/x86/include/asm/perf_event_p4.h
> > index 94de1a05aeba..b14e9a20a7c0 100644
> > --- a/arch/x86/include/asm/perf_event_p4.h
> > +++ b/arch/x86/include/asm/perf_event_p4.h
> > @@ -189,7 +189,7 @@ static inline int p4_ht_active(void)
> >  static inline int p4_ht_thread(int cpu)
> >  {
> >  #ifdef CONFIG_SMP
> > -       if (smp_num_siblings == 2)
> > +       if (smp_num_siblings > 1)
> >                 return cpu !=
> > cpumask_first(this_cpu_cpumask_var_ptr(cpu_sibling_map));
> 
> This fix too should probably come before all the other changes.
> 
> (Not that Pentium 4 code is expected to ever see such SMT thread
> values.)
> 
Do you mean that this is a clean fix, and there is no reason for this
patch to be blocked by any of the other patches in this series?

thanks,
rui

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