[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <d9d0deef-92e1-05b4-a195-d2ca03801129@microchip.com>
Date: Mon, 15 Aug 2022 19:10:04 +0000
From: <Conor.Dooley@...rochip.com>
To: <prabhakar.mahadev-lad.rj@...renesas.com>, <robh+dt@...nel.org>,
<krzysztof.kozlowski+dt@...aro.org>, <paul.walmsley@...ive.com>,
<palmer@...belt.com>, <aou@...s.berkeley.edu>,
<geert+renesas@...der.be>
CC: <anup@...infault.org>, <linux-renesas-soc@...r.kernel.org>,
<devicetree@...r.kernel.org>, <linux-riscv@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>, <prabhakar.csengg@...il.com>,
<biju.das.jz@...renesas.com>
Subject: Re: [PATCH v2 4/8] RISC-V: Kconfig.socs: Add Renesas RZ/Five SoC
kconfig option
On 15/08/2022 16:14, Lad Prabhakar wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> Introduce SOC_RENESAS_RZFIVE config option to enable Renesas RZ/Five
> (R9A07G043) SoC, along side also add ARCH_RENESAS config option as most
> of the Renesas drivers depend on this config option.
Hey Lad,
I think I said something similar on v1, but I said it again
to Samuel today so I may as well repost here too:
"I think this and patch 12/12 with the defconfig changes should be
deferred until post LPC (which still leaves plenty of time for
making the 6.1 merge window). We already have like 4 different
approaches between the existing SOC_FOO symbols & two more when
D1 stuff and the Renesas stuff is considered.
Plan is to decide at LPC on one approach for what to do with
Kconfig.socs & to me it seems like a good idea to do what's being
done here - it's likely that further arm vendors will move and
keeping the common symbols makes a lot of sense to me..."
Also, for the sake of my OCD could you pick either riscv or
RISC-V and use it for the whole series? Pedantic I guess, but
/shrug
Thanks,
Conor.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
> ---
> v1->v2
> * No Change
> ---
> arch/riscv/Kconfig.socs | 14 ++++++++++++++
> 1 file changed, 14 insertions(+)
>
> diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
> index 69774bb362d6..91b7f38b77a8 100644
> --- a/arch/riscv/Kconfig.socs
> +++ b/arch/riscv/Kconfig.socs
> @@ -80,4 +80,18 @@ config SOC_CANAAN_K210_DTB_SOURCE
>
> endif # SOC_CANAAN
>
> +config ARCH_RENESAS
> + bool
> + select GPIOLIB
> + select PINCTRL
> + select SOC_BUS
> +
> +config SOC_RENESAS_RZFIVE
> + bool "Renesas RZ/Five SoC"
> + select ARCH_R9A07G043
> + select ARCH_RENESAS
> + select RESET_CONTROLLER
> + help
> + This enables support for Renesas RZ/Five SoC.
> +
> endmenu # "SoC selection"
> --
> 2.25.1
>
Powered by blists - more mailing lists